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Functions
12,151 in github.com/capstone-engine/capstone
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Functions
12,151
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Types & classes
3,652
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/MachineBasicBlock.h:67
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/MachineBasicBlock.h:473
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:487
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/TileShapeInfo.h:41
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/DIE.h:609
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/DIE.h:631
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/ScheduleDAG.h:131
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/ScheduleDAG.h:630
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstrBundle.h:148
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstrBundleIterator.h:184
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:1048
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:1156
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/RegisterPressure.h:129
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/RegisterPressure.h:246
Method
operator==
Compare two SlotIndex objects for equality.
suite/synctools/tablegen/include/llvm/CodeGen/SlotIndexes.h:165
Method
operator==
Comparisons between register objects
suite/synctools/tablegen/include/llvm/CodeGen/Register.h:129
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegionInfo.h:56
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegionInfo.h:68
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/MachinePipeliner.h:414
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/MachineScheduler.h:830
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/MachineScheduler.h:850
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h:193
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h:210
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegacyLegalizerInfo.h:112
Method
operator==
Comparison operator.
suite/synctools/tablegen/include/llvm/CodeGen/PBQP/Math.h:52
Method
operator==
Comparison operator.
suite/synctools/tablegen/include/llvm/CodeGen/PBQP/Math.h:153
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/PBQP/Graph.h:243
Method
operator==
suite/synctools/tablegen/include/llvm/CodeGen/PBQP/Graph.h:267
Method
operator>
suite/synctools/tablegen/include/llvm/CodeGen/ScheduleDFS.h:48
Method
operator>
Compare two SlotIndex objects. Return true if the first index is greater than the second.
suite/synctools/tablegen/include/llvm/CodeGen/SlotIndexes.h:186
Method
operator>
Sort the node sets by importance. First, rank them by recurrence MII, then by mobility (least mobile done first), and finally by depth. Each node set
suite/synctools/tablegen/include/llvm/CodeGen/MachinePipeliner.h:403
Method
operator>
Check if this is greater than \p Cost.
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/RegBankSelect.h:468
Method
operator>=
suite/synctools/tablegen/include/llvm/CodeGen/ScheduleDFS.h:55
Method
operator>=
Compare two SlotIndex objects. Return true if the first index is greater than, or equal to, the second.
suite/synctools/tablegen/include/llvm/CodeGen/SlotIndexes.h:192
Method
operator[]
Specially implement the [] operation using a proxy object to support assignment.
suite/synctools/tablegen/include/llvm/IR/CFG.h:230
Method
operator[]
suite/synctools/tablegen/include/llvm/IR/Metadata.h:1367
Method
operator[]
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:82
Method
operator[]
suite/synctools/tablegen/include/llvm/CodeGen/MachinePostDominators.h:46
Method
operator[]
suite/synctools/tablegen/include/llvm/CodeGen/RegAllocPBQP.h:107
Method
operator[]
suite/synctools/tablegen/include/llvm/CodeGen/MachineDominators.h:161
Method
operator[]
Same as getLoopFor.
suite/synctools/tablegen/include/llvm/CodeGen/MachineLoopInfo.h:132
Method
operator|=
suite/synctools/tablegen/include/llvm/IR/Operator.h:247
Function
opfxx6
arch/SH/SHDisassembler.c:1298
Function
opfxx7
arch/SH/SHDisassembler.c:1304
Function
opfxx8
arch/SH/SHDisassembler.c:1310
Function
opfxx9
arch/SH/SHDisassembler.c:1316
Function
opfxxa
arch/SH/SHDisassembler.c:1322
Function
opfxxb
arch/SH/SHDisassembler.c:1328
Function
opfxxd
arch/SH/SHDisassembler.c:1344
Function
opidx_dir_rel_hdlr
handler for bit test and branch instruction. Used by M6805. The bit index is part of the opcode. Example: BRSET 3,<$40,LOOP
arch/M680X/M680XDisassembler.c:1632
Function
opidx_hdlr
arch/M680X/M680XDisassembler.c:1619
Method
ops
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:913
Method
optimizeCompareInstr
See if the comparison instruction can be converted into something more efficient. E.g., on ARM most instructions can set the flags register, obviating
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:1548
Method
optimizeCondBranch
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:1554
Method
optimizeLoadInstr
Try to remove the load by folding it to a register operand at the use. We fold the load instructions if and only if the def and use are in the same BB
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:1563
Method
optimizeSelect
Given a select instruction that was understood by analyzeSelect and returned Optimizable = true, attempt to optimize MI by merging it with one of its
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:947
Method
order
suite/synctools/tablegen/include/llvm/CodeGen/AccelTable.h:292
Method
order
suite/synctools/tablegen/include/llvm/CodeGen/AccelTable.h:335
Method
order
suite/synctools/tablegen/include/llvm/CodeGen/AccelTable.h:372
Method
order
suite/synctools/tablegen/include/llvm/CodeGen/AccelTable.h:399
Method
orderFrameObjects
Order the symbols in the local stack frame. The list of objects that we want to order is in \p objectsToAllocate as indices into the MachineFrameInfo.
suite/synctools/tablegen/include/llvm/CodeGen/TargetFrameLowering.h:390
Method
output
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndexYAML.h:82
Method
output
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndexYAML.h:125
Method
output
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndexYAML.h:240
Method
output
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndexYAML.h:272
Method
output
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:48
Method
output
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:69
Method
output
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:89
Method
output
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:113
Method
output
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:146
Method
output
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:163
Method
output
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:402
Method
overlaps
overlaps - Return true if the intersection of the two live ranges is not empty.
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:440
Method
overlaps
Returns true if the specified SDep is equivalent except for latency.
suite/synctools/tablegen/include/llvm/CodeGen/ScheduleDAG.h:465
Method
overrideSchedPolicy
Override generic scheduling policy within a region. This is a convenient way for targets that don't provide any custom scheduling heuristics (no cust
suite/synctools/tablegen/include/llvm/CodeGen/TargetSubtargetInfo.h:225
Method
packProbeData
The following APIs encodes/decodes per-probe information to/from a 32-bit integer which is organized as: [2:0] - 0x7, this is reserved for regular dis
suite/synctools/tablegen/include/llvm/IR/PseudoProbe.h:43
Method
param_begin
suite/synctools/tablegen/include/llvm/IR/DerivedTypes.h:128
Method
param_end
suite/synctools/tablegen/include/llvm/IR/DerivedTypes.h:129
Method
params
suite/synctools/tablegen/include/llvm/IR/DerivedTypes.h:130
Method
parseCustomPseudoSourceValue
Implement target specific parsing of target custom pseudo source value.
suite/synctools/tablegen/include/llvm/CodeGen/MIRFormatter.h:62
Method
parseImmMnemonic
Implement target specific parsing of immediate mnemonics. The mnemonic is dot seperated strings.
suite/synctools/tablegen/include/llvm/CodeGen/MIRFormatter.h:46
Method
parseMachineFunctionInfo
Parse out the target's MachineFunctionInfo from the YAML reprsentation.
suite/synctools/tablegen/include/llvm/Target/TargetMachine.h:157
Method
partiallySplitLTOUnits
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndex.h:1303
Method
passEnumerate
suite/synctools/tablegen/include/llvm/IR/LegacyPassNameParser.h:77
Method
passIsRequiredImpl
suite/synctools/tablegen/include/llvm/IR/PassManagerInternal.h:103
Method
passRegistered
Implement the PassRegistrationListener callbacks used to populate our map
suite/synctools/tablegen/include/llvm/IR/LegacyPassNameParser.h:68
Method
payload_t
suite/synctools/tablegen/include/llvm/CodeGen/FunctionLoweringInfo.h:108
Method
peekDebugInstrNum
Examine the instruction number of this MachineInstr. May be zero if it hasn't been assigned a number yet.
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:465
Method
phi_iterator_impl
suite/synctools/tablegen/include/llvm/IR/BasicBlock.h:322
Function
phys_regs_and_masks
Returns an iterator range over all physical register and mask operands for \p MI and bundled instructions. This also skips any debug operands.
suite/synctools/tablegen/include/llvm/CodeGen/LiveRegUnits.h:164
Method
platform
(int a, int m, int syt, byte[] c, String s)
bindings/java/TestBasic.java:14
Method
popBeforeNonSkippedPassCallback
suite/synctools/tablegen/include/llvm/IR/PassInstrumentation.h:312
Method
popFinalizationCB
Pop the last finalization callback from the finalization stack. NOTE: Temporary solution until Clang CG is gone.
suite/synctools/tablegen/include/llvm/Frontend/OpenMP/OMPIRBuilder.h:85
Method
pop_back
suite/synctools/tablegen/include/llvm/CodeGen/MachineBasicBlock.h:859
Method
pop_front
suite/synctools/tablegen/include/llvm/CodeGen/MachineBasicBlock.h:858
Method
populateInheritedAnalysis
Collect AvailableAnalysis from all the active Pass Managers.
suite/synctools/tablegen/include/llvm/IR/LegacyPassManagers.h:392
Method
populateRemappings
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:528
Method
populateSymtab
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:519
Method
postOptimization
suite/synctools/tablegen/include/llvm/CodeGen/Spiller.h:33
Function
pred_empty
suite/synctools/tablegen/include/llvm/IR/CFG.h:119
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