map instruction name to public instruction ID

map internal raw register to 'public' register

Implement the MachinePassRegistryListener callbacks.

check if this insn is relative branch

given alias mnemonic, return instruction ID & CC

map instruction name to public instruction ID

Returns the next integer (mod 2**64) that is greater than or equal to \p Value and is a multiple of \p Align. \p Align must be non-zero. Examples: \c

map instruction name to instruction ID (public)

map internal raw register to 'public' register

Thumb VFP instructions are a special case. Because we share their encodings between ARM and Thumb modes, and they are predicable in ARM mode, the auto

fill in details

Build per-handle O(1) lookup tables for instruction mapping. Called from X86_global_init() during cs_open(). Each handle gets its own copy of the look

ATT just reuses Intel data, but with the order of registers reversed

return register of given instruction id return 0 if not found this is to handle instructions embedding accumulate registers into AsmStrs[] Falls back

Fast per-handle variant used from the printer (which has access to cs_struct via MCInst).

TODO: remove non-AtIndex versions of these methods. adds the attribute to the list of attributes.

Add called function \p F with samples \p S. Optionally scale sample count \p S by \p Weight. Sample counts accumulate using saturating arithmetic, to

addChild - Add a child scope.

addGCPasses - Add late codegen passes that analyze code for garbage collection. This should return true if GC info should be printed after these passe

This method should install a (global) instruction selector pass, which converts possibly generic instructions to fully target-specific instructions, t

Add passes that optimize instruction level parallelism for out-of-order targets. These passes are run while the machine code is still in SSA form, so

This method should install an IR translator pass, which converts from LLVM code to machine instructions with possibly generic opcodes.

This method should install a legalize pass, which converts the instruction sequence into one that can be selected by the target.

This method may be implemented by targets that want to run passes after register allocation pass pipeline but before prolog-epilog insertion.

Add passes to be run immediately after virtual registers are rewritten to physical registers.

This pass may be implemented by targets that want to run passes immediately before machine code is emitted.

Targets may add passes immediately before machine code is emitted in this callback. This is called even later than `addPreEmitPass`. FIXME: Rename `ad

This method may be implemented by targets that want to run passes immediately before the (global) instruction selection.

addPreISel - This method should add any "last minute" LLVM->LLVM passes (which are run just before instruction selector).

This method may be implemented by targets that want to run passes immediately before legalization.

This method may be implemented by targets that want to run passes immediately before register allocation.

This method may be implemented by targets that want to run passes immediately before the register bank selection.

addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is complete, but before virtual registers are rewri

This method may be implemented by targets that want to run passes after prolog-epilog insertion and before the second instruction scheduling pass.

This method should install a register bank selector pass, which assigns register banks to virtual registers without a register class or register banks

Adds all register units marked in the bitvector \p RegUnits.

This method should only be used by the Use class.

Return true if lowering to a jump table is allowed.