Return an array that contains the MMO target flag values and their names. MIR Serialization is able to serialize only the MMO target flags that are d

Return an array that contains the ids of the target indices (used for the TargetIndex machine operand) and their names. MIR Serialization is able to

Helper function to make it easier to build SetCC's if you just have an ISD::CondCode instead of an SDValue.

Return the mask for this instruction, for use in bitcode. TODO: This is temporary until we decide a new bitcode encoding for shufflevector.

Return a uint64_t with just the most significant bit set (the sign bit, if the value is treated as a signed number).

For example, EQ->EQ, SLE->SLE, UGT->SGT, etc. @returns the predicate that would be the result if the operand were regarded as signed. Return the signe

For example, ULT->SLT, ULE->SLE, UGT->SGT, UGE->SGE, SLT->Failed assert @returns the signed version of the predicate for this instruction (which has t

Return the signedness of this variable's type, or None if this type is neither signed nor unsigned.

getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint.

Return the simple ValueType of the referenced return value.

Return the type of a specified result as a simple type.

Return the MVT corresponding to this LLVM type. See getValueType.

If this set contains all but a single element, return it, otherwise return null.

Return the size in bits of the memory reference.

This is just like getRawSource, but it strips off any cast instructions that feed it, giving the original input. The returned value is guaranteed to

Get the source BlockT of this iterator.

FIXME: Remove this function once transition to Align is over. Use getSourceAlign() instead.

Returns the I'th source register.

Return the minimum required alignment in bytes for a spill slot for a register of this class.

Spill option index.

Return the size in bytes of the stack slot allocated to hold a spilled copy of a register from class RC.

Return a splat ISD::BUILD_VECTOR node, consisting of Op splatted to all elements. VT must be a vector type. Op's type must be the same as (or, for int

Return a splat ISD::SPLAT_VECTOR node, consisting of Op splatted to all elements.

Return either a square root or its reciprocal estimate value for the input operand. \p Enabled is a ReciprocalEstimate enum with value either 'Unspeci

Return a target-dependent result if the input operand is not suitable for use with a square root estimate calculation.

Returns the address space of the pointer operand.

Return the source type, as a convenience

Returns the offset from the location of the access.

getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligned on entry to a function. Typically, this is the

Retrieve the stack alignment attribute, if it exists.

getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligned on entry to a function. Typically, this is the

getStackGrowthDirection - Return the direction the stack grows

\see StackID

Returns the StackID that scalable vectors should be associated with.

Get the index at which stack map locations will be recorded. Arguments are not recorded unless the anyregcc convention is used.

If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save and restore.

Return the index for the stack protector object.

Return the number of bytes that must be allocated to hold all of the fixed size frame objects. This is only valid after Prolog/Epilog code insertion

returns the stack slot mapped to the specified virtual register

Helper to get the stage of an instruction in the schedule.

The number of stages for a Phi is a little different than other instructions. The minimum value computed in RegToStageDiff is 1 because we assume the

Return the max. number of stages/iterations that can occur between a register definition and its uses.