| 361 | #include "PPCGenInstrInfo.inc" |
| 362 | |
| 363 | static DecodeStatus decodeMemRIOperands(MCInst *Inst, uint64_t Imm, |
| 364 | int64_t Address, const void *Decoder) |
| 365 | { |
| 366 | // Decode the memri field (imm, reg), which has the low 16-bits as the |
| 367 | // displacement and the next 5 bits as the register #. |
| 368 | |
| 369 | uint64_t Base = Imm >> 16; |
| 370 | uint64_t Disp = Imm & 0xFFFF; |
| 371 | |
| 372 | // assert(Base < 32 && "Invalid base register"); |
| 373 | if (Base >= 32) |
| 374 | return MCDisassembler_Fail; |
| 375 | |
| 376 | switch (MCInst_getOpcode(Inst)) { |
| 377 | default: break; |
| 378 | case PPC_LBZU: |
| 379 | case PPC_LHAU: |
| 380 | case PPC_LHZU: |
| 381 | case PPC_LWZU: |
| 382 | case PPC_LFSU: |
| 383 | case PPC_LFDU: |
| 384 | // Add the tied output operand. |
| 385 | MCOperand_CreateReg0(Inst, GP0Regs[Base]); |
| 386 | break; |
| 387 | case PPC_STBU: |
| 388 | case PPC_STHU: |
| 389 | case PPC_STWU: |
| 390 | case PPC_STFSU: |
| 391 | case PPC_STFDU: |
| 392 | MCInst_insert0(Inst, 0, MCOperand_CreateReg1(Inst, GP0Regs[Base])); |
| 393 | break; |
| 394 | } |
| 395 | |
| 396 | MCOperand_CreateImm0(Inst, SignExtend64(Disp, 16)); |
| 397 | MCOperand_CreateReg0(Inst, GP0Regs[Base]); |
| 398 | |
| 399 | return MCDisassembler_Success; |
| 400 | } |
| 401 | |
| 402 | static DecodeStatus decodeMemRIXOperands(MCInst *Inst, uint64_t Imm, |
| 403 | int64_t Address, const void *Decoder) |
nothing calls this directly
no test coverage detected
searching dependent graphs…