| 400 | } |
| 401 | |
| 402 | static DecodeStatus decodeMemRIXOperands(MCInst *Inst, uint64_t Imm, |
| 403 | int64_t Address, const void *Decoder) |
| 404 | { |
| 405 | // Decode the memrix field (imm, reg), which has the low 14-bits as the |
| 406 | // displacement and the next 5 bits as the register #. |
| 407 | |
| 408 | uint64_t Base = Imm >> 14; |
| 409 | uint64_t Disp = Imm & 0x3FFF; |
| 410 | |
| 411 | // assert(Base < 32 && "Invalid base register"); |
| 412 | if (Base >= 32) |
| 413 | return MCDisassembler_Fail; |
| 414 | |
| 415 | if (MCInst_getOpcode(Inst) == PPC_LDU) |
| 416 | // Add the tied output operand. |
| 417 | MCOperand_CreateReg0(Inst, GP0Regs[Base]); |
| 418 | else if (MCInst_getOpcode(Inst) == PPC_STDU) |
| 419 | MCInst_insert0(Inst, 0, MCOperand_CreateReg1(Inst, GP0Regs[Base])); |
| 420 | |
| 421 | MCOperand_CreateImm0(Inst, SignExtend64(Disp << 2, 16)); |
| 422 | MCOperand_CreateReg0(Inst, GP0Regs[Base]); |
| 423 | |
| 424 | return MCDisassembler_Success; |
| 425 | } |
| 426 | |
| 427 | static DecodeStatus decodeMemRIX16Operands(MCInst *Inst, uint64_t Imm, |
| 428 | int64_t Address, const void *Decoder) |
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