NOTE: Does nothing with the Univac-Sperry F3W9

NOTE: Does nothing with the HP150

NOTE: Does nothing with the FACOM6684

Empty function to handle some layouts that have non-volatile storage control

\brief System Tick Configuration The function initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is i

* \brief Setup the microcontroller system. * * Initialize the System and update the SystemFrequency variable. */

UART Data Ready

\brief Remove the exclusive lock This function removes the exclusive lock which is created by LDREX. */

\brief Count leading zeros This function counts the number of leading zeros of a data value. \param [in] value Value to count the leading

\brief Data Memory Barrier This function ensures the apparent order of the explicit memory operations before and after the instruction, with

\brief Instruction Synchronization Barrier Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructio

\brief LDRT Unprivileged (8 bit) This function executes a Unprivileged LDRT instruction for 8 bit value. \param [in] ptr Pointer to dat

\brief LDR Exclusive (8 bit) This function executes a exclusive LDR instruction for 8 bit value. \param [in] ptr Pointer to data \r

\brief LDR Exclusive (16 bit) This function executes a exclusive LDR instruction for 16 bit values. \param [in] ptr Pointer to data

\brief LDR Exclusive (32 bit) This function executes a exclusive LDR instruction for 32 bit values. \param [in] ptr Pointer to data

\brief LDRT Unprivileged (16 bit) This function executes a Unprivileged LDRT instruction for 16 bit values. \param [in] ptr Pointer to

\brief LDRT Unprivileged (32 bit) This function executes a Unprivileged LDRT instruction for 32 bit values. \param [in] ptr Pointer to

* @brief C custom defined QADD16 for M3 and M0 processors */

* @brief C custom defined QADD8 for M3 and M0 processors */

* @brief C custom defined QASX for M3 and M0 processors */

* @brief C custom defined QSAX for M3 and M0 processors */

* @brief C custom defined QSUB16 for M3 and M0 processors */

* @brief C custom defined QSUB8 for M3 and M0 processors */

\brief Reverse bit order of value This function reverses the bit order of the given value. \param [in] value Value to reverse \retu

\brief Reverse byte order (32 bit) This function reverses the byte order in integer value. \param [in] value Value to reverse \retu

\brief Rotate Right in unsigned value (32 bit) This function Rotate Right (immediate) provides the value of the contents of a register rotated b

\brief Send Event Send Event is a hint instruction. It causes an event to be signaled to the CPU. */

* @brief C custom defined SHADD16 for M3 and M0 processors */

* @brief C custom defined SHASX for M3 and M0 processors */

* @brief C custom defined SHSAX for M3 and M0 processors */

* @brief C custom defined SHSUB16 for M3 and M0 processors */

* @brief C custom defined SMLAD for M3 and M0 processors */

* @brief C custom defined SMLADX for M3 and M0 processors */

* @brief C custom defined SMLALDX for M3 and M0 processors */

* @brief C custom defined SMLSDX for M3 and M0 processors */

* @brief C custom defined SMUADX for M3 and M0 processors */

* @brief C custom defined SMUSD for M3 and M0 processors */

* @brief C custom defined SMUSDX for M3 and M0 processors */

\brief STRT Unprivileged (8 bit) This function executes a Unprivileged STRT instruction for 8 bit values. \param [in] value Value to stor

\brief STR Exclusive (8 bit) This function executes a exclusive STR instruction for 8 bit values. \param [in] value Value to store \p

\brief STR Exclusive (16 bit) This function executes a exclusive STR instruction for 16 bit values. \param [in] value Value to store

\brief STR Exclusive (32 bit) This function executes a exclusive STR instruction for 32 bit values. \param [in] value Value to store

\brief STRT Unprivileged (16 bit) This function executes a Unprivileged STRT instruction for 16 bit values. \param [in] value Value to st

\brief STRT Unprivileged (32 bit) This function executes a Unprivileged STRT instruction for 32 bit values. \param [in] value Value to st

* @brief C custom defined SXTB16 for M3 and M0 processors */

\brief Disable FIQ This function disables FIQ interrupts by setting the F-bit in the CPSR. Can only be executed in Privileged modes. */

\brief Enable FIQ This function enables FIQ interrupts by clearing the F-bit in the CPSR. Can only be executed in Privileged modes. */

\brief Get APSR Register This function returns the content of the APSR Register. \return APSR Register value */

\brief Get Base Priority This function returns the current value of the Base Priority register. \return Base Priority registe

\brief Get Control Register This function returns the content of the Control Register. \return Control Register value */

\brief Get Fault Mask This function returns the current value of the Fault Mask register. \return Fault Mask register value

\brief Get FPSCR This function returns the current value of the Floating Point Status/Control register. \return Floating Poin

\brief Get IPSR Register This function returns the content of the IPSR Register. \return IPSR Register value */

\brief Get Priority Mask This function returns the current state of the priority mask bit from the Priority Mask Register. \return

\brief Get Process Stack Pointer This function returns the current value of the Process Stack Pointer (PSP). \return PSP Regi

returns 0 if interrupts enabled, 1 if disabled

\brief Get xPSR Register This function returns the content of the xPSR Register. \return xPSR Register value */

@param history_len: Number of layer states to retain

Initializes control object @param scan_module: Path to ScanModule python script @param output_module: Path to OutputModule