| 297 | } |
| 298 | |
| 299 | constexpr uint64_t ToDoubleBits(uint16_t h) |
| 300 | { |
| 301 | uint16_t h_exp = (h&0x7c00u); |
| 302 | uint64_t d_sgn = ((uint64_t)h&0x8000u) << 48; |
| 303 | switch (h_exp) { |
| 304 | case 0x0000u: { // 0 or subnormal |
| 305 | uint16_t h_sig = (h&0x03ffu); |
| 306 | // Signed zero |
| 307 | if (h_sig == 0) { |
| 308 | return d_sgn; |
| 309 | } |
| 310 | // Subnormal |
| 311 | h_sig <<= 1; |
| 312 | while ((h_sig&0x0400u) == 0) { |
| 313 | h_sig <<= 1; |
| 314 | h_exp++; |
| 315 | } |
| 316 | uint64_t d_exp = ((uint64_t)(1023 - 15 - h_exp)) << 52; |
| 317 | uint64_t d_sig = ((uint64_t)(h_sig&0x03ffu)) << 42; |
| 318 | return d_sgn + d_exp + d_sig; |
| 319 | } |
| 320 | case 0x7c00u: // inf or NaN |
| 321 | // All-ones exponent and a copy of the significand |
| 322 | return d_sgn + 0x7ff0000000000000ULL + (((uint64_t)(h&0x03ffu)) << 42); |
| 323 | default: // normalized |
| 324 | // Just need to adjust the exponent and shift |
| 325 | return d_sgn + (((uint64_t)(h&0x7fffu) + 0xfc000u) << 42); |
| 326 | } |
| 327 | } |
| 328 | |
| 329 | }} // namespace np::half_private |
| 330 | #endif // NUMPY_CORE_SRC_COMMON_HALF_PRIVATE_HPP |
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