divide each signed 16-bit element by a precomputed divisor (round towards zero)
| 117 | } |
| 118 | // divide each signed 16-bit element by a precomputed divisor (round towards zero) |
| 119 | NPY_FINLINE npyv_s16 npyv_divc_s16(npyv_s16 a, const npyv_s16x3 divisor) |
| 120 | { |
| 121 | const __m128i shf1 = _mm256_castsi256_si128(divisor.val[1]); |
| 122 | // high part of signed multiplication |
| 123 | __m256i mulhi = _mm256_mulhi_epi16(a, divisor.val[0]); |
| 124 | // q = ((a + mulhi) >> sh1) - XSIGN(a) |
| 125 | // trunc(a/d) = (q ^ dsign) - dsign |
| 126 | __m256i q = _mm256_sra_epi16(_mm256_add_epi16(a, mulhi), shf1); |
| 127 | q = _mm256_sub_epi16(q, _mm256_srai_epi16(a, 15)); |
| 128 | q = _mm256_sub_epi16(_mm256_xor_si256(q, divisor.val[2]), divisor.val[2]); |
| 129 | return q; |
| 130 | } |
| 131 | // divide each unsigned 32-bit element by a precomputed divisor |
| 132 | NPY_FINLINE npyv_u32 npyv_divc_u32(npyv_u32 a, const npyv_u32x3 divisor) |
| 133 | { |