| 224 | // Initializing divisor parameters for signed 8-bit division |
| 225 | NPY_FINLINE npyv_s16x3 npyv_divisor_s16(npy_int16 d); |
| 226 | NPY_FINLINE npyv_s8x3 npyv_divisor_s8(npy_int8 d) |
| 227 | { |
| 228 | #ifdef NPY_HAVE_SSE2 // SSE/AVX2/AVX512 |
| 229 | npyv_s16x3 p = npyv_divisor_s16(d); |
| 230 | npyv_s8x3 r; |
| 231 | r.val[0] = npyv_reinterpret_s8_s16(p.val[0]); |
| 232 | r.val[1] = npyv_reinterpret_s8_s16(p.val[1]); |
| 233 | r.val[2] = npyv_reinterpret_s8_s16(p.val[2]); |
| 234 | return r; |
| 235 | #else |
| 236 | int d1 = abs(d); |
| 237 | int sh, m; |
| 238 | if (d1 > 1) { |
| 239 | sh = (int)npyv__bitscan_revnz_u32(d1-1); // ceil(log2(abs(d))) - 1 |
| 240 | m = (1 << (8 + sh)) / d1 + 1; // multiplier |
| 241 | } |
| 242 | else if (d1 == 1) { |
| 243 | sh = 0; m = 1; |
| 244 | } |
| 245 | else { |
| 246 | // raise arithmetic exception for d == 0 |
| 247 | sh = m = 1 / ((npy_int8 volatile *)&d)[0]; // LCOV_EXCL_LINE |
| 248 | } |
| 249 | npyv_s8x3 divisor; |
| 250 | divisor.val[0] = npyv_setall_s8(m); |
| 251 | divisor.val[2] = npyv_setall_s8(d < 0 ? -1 : 0); |
| 252 | #if defined(NPY_HAVE_VSX2) || defined(NPY_HAVE_VX) |
| 253 | divisor.val[1] = npyv_setall_s8(sh); |
| 254 | #elif defined(NPY_HAVE_NEON) |
| 255 | divisor.val[1] = npyv_setall_s8(-sh); |
| 256 | #else |
| 257 | #error "please initialize the shifting operand for the new architecture" |
| 258 | #endif |
| 259 | return divisor; |
| 260 | #endif |
| 261 | } |
| 262 | // Initializing divisor parameters for unsigned 16-bit division |
| 263 | NPY_FINLINE npyv_u16x3 npyv_divisor_u16(npy_uint16 d) |
| 264 | { |
nothing calls this directly
no test coverage detected