Round to nearest even integer, assume CPU control register is set to rounding. Test intrinsics: npyv_round_s32_##SFX
(self)
| 325 | To only test single precision |
| 326 | """ |
| 327 | def test_conversions(self): |
| 328 | """ |
| 329 | Round to nearest even integer, assume CPU control register is set to rounding. |
| 330 | Test intrinsics: |
| 331 | npyv_round_s32_##SFX |
| 332 | """ |
| 333 | features = self._cpu_features() |
| 334 | if not self.npyv.simd_f64 and re.match(r".*(NEON|ASIMD)", features): |
| 335 | # very costly to emulate nearest even on Armv7 |
| 336 | # instead we round halves to up. e.g. 0.5 -> 1, -0.5 -> -1 |
| 337 | _round = lambda v: int(v + (0.5 if v >= 0 else -0.5)) |
| 338 | else: |
| 339 | _round = round |
| 340 | vdata_a = self.load(self._data()) |
| 341 | vdata_a = self.sub(vdata_a, self.setall(0.5)) |
| 342 | data_round = [_round(x) for x in vdata_a] |
| 343 | vround = self.round_s32(vdata_a) |
| 344 | assert vround == data_round |
| 345 | |
| 346 | class _SIMD_FP64(_Test_Utility): |
| 347 | """ |
nothing calls this directly
no test coverage detected