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github.com/capstone-engine/capstone
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Functions
12,151 in github.com/capstone-engine/capstone
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Functions
12,151
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Types & classes
3,652
Method
test_operands
Check that the `operands` API provides correct data
suite/regress/test_arm64_pac.py:75
Method
test_operands
Check that the `operands` API provides correct data
suite/regress/test_arm64_mov.py:59
Method
test_registers
Check that the `regs_access` API provides correct data
suite/regress/test_arm64_ldr_registers.py:39
Method
test_regs_access
Check that the `regs_access` API provides correct data
suite/regress/test_arm64_bra.py:32
Method
test_regs_access
Check that the `regs_access` API provides correct data
suite/regress/test_arm64_pac.py:67
Method
test_regs_access
Check that the `regs_access` API provides correct data
suite/regress/test_arm64_mov.py:51
Function
testcb
(buffer, size, offset, userdata)
bindings/python/tests/test_skipdata.py:20
Function
tfm_hdlr
handler for TFM instruction, e.g: TFM X+,Y+ Used by HD6309
arch/M680X/M680XDisassembler.c:1598
Method
thisT
Helper function to access this as a T.
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:83
Method
toCompress
suite/synctools/tablegen/include/llvm/ProfileData/SampleProf.h:1245
Method
toIterator
suite/synctools/tablegen/include/llvm/CodeGen/DIE.h:643
Method
toPtr
suite/synctools/tablegen/include/llvm/IR/SymbolTableListTraits.h:104
Method
toSPFlags
Helper for converting old bitfields to new flags word.
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:1872
Method
toString
suite/synctools/tablegen/include/llvm/ProfileData/SampleProf.h:436
Function
to_hex
(s)
suite/benchmark.py:45
Function
to_hex
(s)
suite/fuzz.py:52
Method
top
suite/synctools/tablegen/include/llvm/IR/LegacyPassManagers.h:143
Method
top
suite/synctools/tablegen/include/llvm/CodeGen/RDFGraph.h:707
Method
top
suite/synctools/tablegen/include/llvm/CodeGen/MachineScheduler.h:328
Method
trace
suite/synctools/tablegen/include/llvm/CodeGen/RDFLiveness.h:122
Method
track
Track the reference to metadata. Register \c MD with \c *MD, if the subclass supports tracking. If \c *MD gets RAUW'ed, \c MD will be updated to the
suite/synctools/tablegen/include/llvm/IR/Metadata.h:223
Method
track
suite/synctools/tablegen/include/llvm/IR/Metadata.h:799
Method
track
suite/synctools/tablegen/include/llvm/IR/TrackingMDRef.h:83
Method
trackLivenessAfterRegAlloc
Returns true if the live-ins should be tracked after register allocation.
suite/synctools/tablegen/include/llvm/CodeGen/TargetRegisterInfo.h:924
Method
tracksRegPressure
suite/synctools/tablegen/include/llvm/CodeGen/ScheduleDAG.h:518
Method
transferNodesFromList
suite/synctools/tablegen/include/llvm/CodeGen/MachineFunction.h:86
Method
translateAShr
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:486
Method
translateAdd
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:412
Method
translateAddrSpaceCast
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:533
Method
translateAnd
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:418
Method
translateCatchPad
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:539
Method
translateCatchRet
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:527
Method
translateCatchSwitch
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:530
Method
translateCleanupPad
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:536
Method
translateCleanupRet
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:524
Method
translateFAdd
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:490
Method
translateFCmp
Translate a floating-point compare instruction (or constant).
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:300
Method
translateFDiv
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:499
Method
translateFMul
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:496
Method
translateFPExt
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:455
Method
translateFPToSI
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:461
Method
translateFPToUI
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:458
Method
translateFPTrunc
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:452
Method
translateFRem
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:502
Method
translateFSub
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:493
Method
translateICmp
Translate an integer compare instruction (or constant).
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:295
Method
translateIntToPtr
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:443
Method
translateLShr
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:483
Method
translateMul
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:421
Method
translateOr
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:424
Method
translatePtrToInt
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:446
Method
translateResume
Stubs to keep the compiler happy while we implement the rest of the translation.
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:521
Method
translateSDiv
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:434
Method
translateSExt
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:472
Method
translateSIToFP
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:467
Method
translateSRem
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:440
Method
translateShl
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:480
Method
translateSub
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:415
Method
translateTrunc
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:449
Method
translateUDiv
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:431
Method
translateUIToFP
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:464
Method
translateURem
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:437
Method
translateUserOp1
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:542
Method
translateUserOp2
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:545
Method
translateXor
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:427
Method
translateZExt
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:476
Method
tryCombineAnyExt
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h:55
Method
tryCombineExtract
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h:1011
Method
tryCombineInstruction
Try to combine away MI. Returns true if it combined away the MI. Adds instructions that are dead as a result of the combine into DeadInsts, which can
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h:1064
Method
tryCombineSExt
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h:170
Method
tryCombineTrunc
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h:226
Method
tryCombineUnmergeValues
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h:809
Method
tryCombineZExt
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h:108
Method
tryFoldImplicitDef
Try to fold G_[ASZ]EXT (G_IMPLICIT_DEF).
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h:328
Method
tryFoldUnmergeCast
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h:364
Method
tryToFoldLoadIntoMI
The specified machine instr operand is a vreg, and that vreg is being provided by the specified load instruction. If possible, try to fold the load a
suite/synctools/tablegen/include/llvm/CodeGen/FastISel.h:300
Function
try_dedisp
(x)
suite/gencstest.py:47
Method
type
suite/synctools/tablegen/include/llvm/CodeGen/RDFGraph.h:293
Method
typeIdx
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h:425
Function
typeIsNot
True iff the given type index is not the specified type.
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h:259
Method
typeSizeEqualsStoreSize
Returns true if no extra padding bits are needed when storing the specified type. For example, returns false for i19 that has a 24-bit store size.
suite/synctools/tablegen/include/llvm/IR/DataLayout.h:494
Method
type_count
suite/synctools/tablegen/include/llvm/IR/DebugInfo.h:150
Method
types
suite/synctools/tablegen/include/llvm/IR/DebugInfo.h:139
Method
uge
This function will return true iff this constant represents a value with active bits bigger than 64 bits or a value greater than the given uint64_t va
suite/synctools/tablegen/include/llvm/IR/Constants.h:237
Method
uint32
(self)
bindings/python/capstone/wasm.py:48
Method
uint64
(self)
bindings/python/capstone/wasm.py:52
Method
unfoldMemoryOperand
unfoldMemoryOperand - Separate a single instruction which folded a load or a store or a load and a store into two or more instruction. If this is poss
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:1281
Method
unlinkDef
suite/synctools/tablegen/include/llvm/CodeGen/RDFGraph.h:774
Method
unlinkUse
suite/synctools/tablegen/include/llvm/CodeGen/RDFGraph.h:768
Method
unqualifiedInlineAsmVariant
The default variant to use in unqualified `asm` instructions. If this returns 0, `asm "$(foo$|bar$)"` will evaluate to `asm "foo"`.
suite/synctools/tablegen/include/llvm/Target/TargetMachine.h:491
Method
unscheduledNode
suite/synctools/tablegen/include/llvm/CodeGen/ScheduleDAG.h:544
Method
unsupportedForDifferentSizes
A SizeChangeStrategy for the common case where legalization for a particular operation consists of only supporting a specific set of type sizes. E.g.
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegacyLegalizerInfo.h:208
Method
untieRegOperand
Break any tie involving OpIdx.
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:1820
Method
untrack
Stop tracking a reference to metadata. Stops \c *MD from tracking \c MD.
suite/synctools/tablegen/include/llvm/IR/Metadata.h:248
Method
untrack
suite/synctools/tablegen/include/llvm/IR/Metadata.h:808
Method
untrack
suite/synctools/tablegen/include/llvm/IR/TrackingMDRef.h:88
Method
unwindsToCaller
suite/synctools/tablegen/include/llvm/IR/Instructions.h:4338
Method
unwindsToCaller
suite/synctools/tablegen/include/llvm/IR/Instructions.h:4666
Function
unwrap
suite/synctools/tablegen/include/llvm/IR/LLVMContext.h:331
Function
unwrap
suite/synctools/tablegen/include/llvm/IR/Module.h:967
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