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github.com/capstone-engine/capstone
/ functions
Functions
12,151 in github.com/capstone-engine/capstone
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Functions
12,151
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Types & classes
3,652
Function
unwrap
suite/synctools/tablegen/include/llvm/IR/DataLayout.h:612
Function
unwrap
suite/synctools/tablegen/include/llvm/IR/Value.h:1040
Function
unwrap
Specialized opaque value conversions.
suite/synctools/tablegen/include/llvm/IR/Attributes.h:259
Function
unwrap
suite/synctools/tablegen/include/llvm/IR/Type.h:498
Function
unwrap
suite/synctools/tablegen/include/llvm/IR/Metadata.h:147
Function
unwrap
suite/synctools/tablegen/include/llvm/Target/CodeGenCWrappers.h:25
Method
unwrapAddress
For targets which wrap address, unwrap for analysis.
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:3709
Method
updateDbgUsersToReg
updateDbgUsersToReg - Update a collection of debug instructions to refer to the designated register.
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:826
Method
updateHotness
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndex.h:80
Method
updateNode
suite/synctools/tablegen/include/llvm/CodeGen/ResourcePriorityQueue.h:87
Method
updateNode
suite/synctools/tablegen/include/llvm/CodeGen/LatencyPriorityQueue.h:61
Method
updateRegAllocHint
A callback to allow target a chance to update register allocation hints when a register is "changed" (e.g. coalesced) to another register. e.g. On ARM
suite/synctools/tablegen/include/llvm/CodeGen/TargetRegisterInfo.h:860
Method
updateRelBlockFreq
Update \p RelBlockFreq from \p BlockFreq and \p EntryFreq BlockFreq is divided by EntryFreq and added to RelBlockFreq. To represent fractional values
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndex.h:91
Method
updateToLocation
Update the internal location to \p Loc.
suite/synctools/tablegen/include/llvm/Frontend/OpenMP/OMPIRBuilder.h:656
Method
updateTotalSamples
Accumulate all body samples to set total samples.
suite/synctools/tablegen/include/llvm/ProfileData/SampleProf.h:738
Method
useAA
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:358
Method
useDebugInfoCorrelate
Return true if we must provide debug info to create PGO profiles.
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:101
Method
useDebugInfoCorrelate
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:300
Method
useFPForScavengingIndex
Returns true if the target wants to use frame pointer based accesses to spill to the scavenger emergency spill slot.
suite/synctools/tablegen/include/llvm/CodeGen/TargetRegisterInfo.h:889
Method
useGPUDivergenceAnalysis
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:262
Method
useIPRA
True if the target wants to use interprocedural register allocation by default. The -enable-ipra flag can be used to override this.
suite/synctools/tablegen/include/llvm/Target/TargetMachine.h:485
Method
useInstrRefDebugInfo
Signal whether instruction referencing variable locations are desired for this function's debug-info.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAG.h:1710
Method
useInstrRefDebugInfo
Signal whether instruction referencing variable locations are desired for this function's debug-info.
suite/synctools/tablegen/include/llvm/CodeGen/FastISel.h:324
Method
useLoadStackGuardNode
If this function returns true, SelectionDAGBuilder emits a LOAD_STACK_GUARD node when it is lowering Intrinsic::stackprotector.
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:4751
Method
useMD5
Return whether names in the profile are all MD5 numbers.
suite/synctools/tablegen/include/llvm/ProfileData/SampleProfReader.h:492
Method
useMD5
Return whether names in the profile are all MD5 numbers.
suite/synctools/tablegen/include/llvm/ProfileData/SampleProfReader.h:783
Method
useMD5
Return whether names in the profile are all MD5 numbers.
suite/synctools/tablegen/include/llvm/ProfileData/SampleProfReader.h:843
Method
useMachineCombiner
Return true when a target supports MachineCombiner.
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:1194
Method
useSoftFloat
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:340
Method
useStackGuardXorFP
If this function returns true, stack protection checks should XOR the frame pointer (or whichever pointer is used to address locals) into the stack gu
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:1832
Method
useStatepoints
Returns true if this strategy is expecting the use of gc.statepoints, and false otherwise.
suite/synctools/tablegen/include/llvm/IR/GCStrategy.h:90
Method
use_begin
Provide iteration support to walk over all uses of an SDNode.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:783
Method
use_begin
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:464
Method
use_bundle_begin
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:493
Method
use_bundle_end
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:496
Method
use_bundle_nodbg_begin
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:552
Method
use_bundle_nodbg_end
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:555
Method
use_bundles
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:500
Method
use_empty
suite/synctools/tablegen/include/llvm/IR/Value.h:344
Method
use_empty
Return true if there are no uses of this node.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:699
Method
use_empty
use_empty - Return true if there are no instructions using the specified register.
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:506
Method
use_end
suite/synctools/tablegen/include/llvm/IR/Value.h:368
Method
use_end
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:787
Method
use_end
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:467
Method
use_instr_begin
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:477
Method
use_instr_end
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:480
Method
use_instr_nodbg_begin
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:535
Method
use_instr_nodbg_end
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:538
Method
use_iterator
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:734
Method
use_iterator_impl
suite/synctools/tablegen/include/llvm/IR/Value.h:130
Method
use_nodbg_begin
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:518
Method
use_nodbg_bundles
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:559
Method
use_nodbg_end
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:521
Method
use_nodbg_instructions
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:542
Method
use_nodbg_operands
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:525
Method
use_operands
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:469
Method
use_size
Return the number of uses of this node. This method takes time proportional to the number of uses.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:706
Method
user_back
suite/synctools/tablegen/include/llvm/IR/Value.h:407
Method
user_back
Specialize the methods defined in Value, as we know that an instruction can only be used by other instructions.
suite/synctools/tablegen/include/llvm/IR/Instruction.h:89
Method
user_empty
suite/synctools/tablegen/include/llvm/IR/Value.h:385
Method
user_iterator_impl
suite/synctools/tablegen/include/llvm/IR/Value.h:171
Method
uses
suite/synctools/tablegen/include/llvm/IR/Value.h:376
Method
uses
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:789
Method
uses
Returns a range that includes all operands that are register uses. This may include unrelated operands which are not register uses.
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:666
Method
usesCustomInsertionHook
Return true if this instruction requires custom insertion support when the DAG scheduler is inserting it into a machine basic block. If this is true
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:1087
Method
usesMSVCFloatingPoint
suite/synctools/tablegen/include/llvm/CodeGen/MachineModuleInfo.h:205
Method
usesMetadata
If set, appropriate metadata tables must be emitted by the back-end (assembler, JIT, or otherwise). For statepoint, this method is currently unsupport
suite/synctools/tablegen/include/llvm/IR/GCStrategy.h:117
Method
usesMorestackAddr
suite/synctools/tablegen/include/llvm/CodeGen/MachineModuleInfo.h:209
Method
usesPhysRegsForValues
True if the target uses physical regs (as nearly all targets do). False for stack machines such as WebAssembly and other virtual-register machines. If
suite/synctools/tablegen/include/llvm/Target/TargetMachine.h:481
Method
vTableFuncs
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndex.h:958
Method
val_empty
suite/synctools/tablegen/include/llvm/TableGen/Record.h:1003
Method
val_size
suite/synctools/tablegen/include/llvm/TableGen/Record.h:1002
Method
validateInstrOrdering
In release builds, this is a no-op. For !NDEBUG builds, the checks are implemented in the .cpp file to avoid circular header deps.
suite/synctools/tablegen/include/llvm/IR/BasicBlock.h:583
Method
value> addPass
suite/synctools/tablegen/include/llvm/IR/PassManager.h:548
Method
valueDefined
Return the value defined by this instruction, if any. This includes dead defs, it is the value created by the instruction's def operands.
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:135
Method
valueIn
Return the value that is live-in to the instruction. This is the value that will be read by the instruction's use operands. Return NULL if no value is
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:105
Method
valueInfoFromEdge
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndex.h:1598
Method
valueOut
Return the value leaving the instruction, if any. This can be a live-through value, or a live def. A dead def returns NULL.
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:123
Method
valueOutOrDead
Returns the value alive at the end of the instruction, if any. This can be a live-through value, a live def or a dead def.
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:129
Method
value_begin
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:987
Method
value_end
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:988
Method
value_iterator
suite/synctools/tablegen/include/llvm/CodeGen/DIE.h:685
Method
value_op_begin
suite/synctools/tablegen/include/llvm/IR/User.h:260
Method
value_op_end
suite/synctools/tablegen/include/llvm/IR/User.h:263
Method
value_op_iterator
suite/synctools/tablegen/include/llvm/IR/User.h:254
Method
value_op_iterator
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:921
Method
values
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:989
Method
varflags
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndex.h:940
Method
varuint32
(self)
bindings/python/capstone/wasm.py:40
Method
varuint64
(self)
bindings/python/capstone/wasm.py:44
Method
verify
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:658
Method
verify
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:883
Method
verifyInstruction
Perform target-specific instruction verification.
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:1652
Method
verifyNotInvalidated
suite/synctools/tablegen/include/llvm/IR/PassManager.h:816
Method
verifyRequiredProperties
Returns true if all properties set in V (i.e. required by a pass) are set in this.
suite/synctools/tablegen/include/llvm/CodeGen/MachineFunction.h:208
Method
verifySecLayout
suite/synctools/tablegen/include/llvm/ProfileData/SampleProfWriter.h:348
Method
version
()
bindings/java/capstone/Capstone.java:462
Function
version_bind
()
bindings/python/capstone/__init__.py:535
Method
virtReg2Index
Convert a virtual register number to a 0-based index. The first virtual register in a function will get the index 0.
suite/synctools/tablegen/include/llvm/CodeGen/Register.h:77
Method
virtRegIndex
Convert a virtual register number to a 0-based index. The first virtual register in a function will get the index 0.
suite/synctools/tablegen/include/llvm/CodeGen/Register.h:103
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