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Functions12,151 in github.com/capstone-engine/capstone

Functionunwrap
suite/synctools/tablegen/include/llvm/IR/DataLayout.h:612
Functionunwrap
suite/synctools/tablegen/include/llvm/IR/Value.h:1040
Functionunwrap
Specialized opaque value conversions.
suite/synctools/tablegen/include/llvm/IR/Attributes.h:259
Functionunwrap
suite/synctools/tablegen/include/llvm/IR/Type.h:498
Functionunwrap
suite/synctools/tablegen/include/llvm/IR/Metadata.h:147
Functionunwrap
suite/synctools/tablegen/include/llvm/Target/CodeGenCWrappers.h:25
MethodunwrapAddress
For targets which wrap address, unwrap for analysis.
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:3709
MethodupdateDbgUsersToReg
updateDbgUsersToReg - Update a collection of debug instructions to refer to the designated register.
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:826
MethodupdateHotness
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndex.h:80
MethodupdateNode
suite/synctools/tablegen/include/llvm/CodeGen/ResourcePriorityQueue.h:87
MethodupdateNode
suite/synctools/tablegen/include/llvm/CodeGen/LatencyPriorityQueue.h:61
MethodupdateRegAllocHint
A callback to allow target a chance to update register allocation hints when a register is "changed" (e.g. coalesced) to another register. e.g. On ARM
suite/synctools/tablegen/include/llvm/CodeGen/TargetRegisterInfo.h:860
MethodupdateRelBlockFreq
Update \p RelBlockFreq from \p BlockFreq and \p EntryFreq BlockFreq is divided by EntryFreq and added to RelBlockFreq. To represent fractional values
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndex.h:91
MethodupdateToLocation
Update the internal location to \p Loc.
suite/synctools/tablegen/include/llvm/Frontend/OpenMP/OMPIRBuilder.h:656
MethodupdateTotalSamples
Accumulate all body samples to set total samples.
suite/synctools/tablegen/include/llvm/ProfileData/SampleProf.h:738
MethoduseAA
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:358
MethoduseDebugInfoCorrelate
Return true if we must provide debug info to create PGO profiles.
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:101
MethoduseDebugInfoCorrelate
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:300
MethoduseFPForScavengingIndex
Returns true if the target wants to use frame pointer based accesses to spill to the scavenger emergency spill slot.
suite/synctools/tablegen/include/llvm/CodeGen/TargetRegisterInfo.h:889
MethoduseGPUDivergenceAnalysis
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:262
MethoduseIPRA
True if the target wants to use interprocedural register allocation by default. The -enable-ipra flag can be used to override this.
suite/synctools/tablegen/include/llvm/Target/TargetMachine.h:485
MethoduseInstrRefDebugInfo
Signal whether instruction referencing variable locations are desired for this function's debug-info.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAG.h:1710
MethoduseInstrRefDebugInfo
Signal whether instruction referencing variable locations are desired for this function's debug-info.
suite/synctools/tablegen/include/llvm/CodeGen/FastISel.h:324
MethoduseLoadStackGuardNode
If this function returns true, SelectionDAGBuilder emits a LOAD_STACK_GUARD node when it is lowering Intrinsic::stackprotector.
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:4751
MethoduseMD5
Return whether names in the profile are all MD5 numbers.
suite/synctools/tablegen/include/llvm/ProfileData/SampleProfReader.h:492
MethoduseMD5
Return whether names in the profile are all MD5 numbers.
suite/synctools/tablegen/include/llvm/ProfileData/SampleProfReader.h:783
MethoduseMD5
Return whether names in the profile are all MD5 numbers.
suite/synctools/tablegen/include/llvm/ProfileData/SampleProfReader.h:843
MethoduseMachineCombiner
Return true when a target supports MachineCombiner.
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:1194
MethoduseSoftFloat
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:340
MethoduseStackGuardXorFP
If this function returns true, stack protection checks should XOR the frame pointer (or whichever pointer is used to address locals) into the stack gu
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:1832
MethoduseStatepoints
Returns true if this strategy is expecting the use of gc.statepoints, and false otherwise.
suite/synctools/tablegen/include/llvm/IR/GCStrategy.h:90
Methoduse_begin
Provide iteration support to walk over all uses of an SDNode.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:783
Methoduse_begin
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:464
Methoduse_bundle_begin
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:493
Methoduse_bundle_end
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:496
Methoduse_bundle_nodbg_begin
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:552
Methoduse_bundle_nodbg_end
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:555
Methoduse_bundles
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:500
Methoduse_empty
suite/synctools/tablegen/include/llvm/IR/Value.h:344
Methoduse_empty
Return true if there are no uses of this node.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:699
Methoduse_empty
use_empty - Return true if there are no instructions using the specified register.
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:506
Methoduse_end
suite/synctools/tablegen/include/llvm/IR/Value.h:368
Methoduse_end
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:787
Methoduse_end
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:467
Methoduse_instr_begin
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:477
Methoduse_instr_end
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:480
Methoduse_instr_nodbg_begin
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:535
Methoduse_instr_nodbg_end
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:538
Methoduse_iterator
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:734
Methoduse_iterator_impl
suite/synctools/tablegen/include/llvm/IR/Value.h:130
Methoduse_nodbg_begin
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:518
Methoduse_nodbg_bundles
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:559
Methoduse_nodbg_end
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:521
Methoduse_nodbg_instructions
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:542
Methoduse_nodbg_operands
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:525
Methoduse_operands
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:469
Methoduse_size
Return the number of uses of this node. This method takes time proportional to the number of uses.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:706
Methoduser_back
suite/synctools/tablegen/include/llvm/IR/Value.h:407
Methoduser_back
Specialize the methods defined in Value, as we know that an instruction can only be used by other instructions.
suite/synctools/tablegen/include/llvm/IR/Instruction.h:89
Methoduser_empty
suite/synctools/tablegen/include/llvm/IR/Value.h:385
Methoduser_iterator_impl
suite/synctools/tablegen/include/llvm/IR/Value.h:171
Methoduses
suite/synctools/tablegen/include/llvm/IR/Value.h:376
Methoduses
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:789
Methoduses
Returns a range that includes all operands that are register uses. This may include unrelated operands which are not register uses.
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:666
MethodusesCustomInsertionHook
Return true if this instruction requires custom insertion support when the DAG scheduler is inserting it into a machine basic block. If this is true
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:1087
MethodusesMSVCFloatingPoint
suite/synctools/tablegen/include/llvm/CodeGen/MachineModuleInfo.h:205
MethodusesMetadata
If set, appropriate metadata tables must be emitted by the back-end (assembler, JIT, or otherwise). For statepoint, this method is currently unsupport
suite/synctools/tablegen/include/llvm/IR/GCStrategy.h:117
MethodusesMorestackAddr
suite/synctools/tablegen/include/llvm/CodeGen/MachineModuleInfo.h:209
MethodusesPhysRegsForValues
True if the target uses physical regs (as nearly all targets do). False for stack machines such as WebAssembly and other virtual-register machines. If
suite/synctools/tablegen/include/llvm/Target/TargetMachine.h:481
MethodvTableFuncs
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndex.h:958
Methodval_empty
suite/synctools/tablegen/include/llvm/TableGen/Record.h:1003
Methodval_size
suite/synctools/tablegen/include/llvm/TableGen/Record.h:1002
MethodvalidateInstrOrdering
In release builds, this is a no-op. For !NDEBUG builds, the checks are implemented in the .cpp file to avoid circular header deps.
suite/synctools/tablegen/include/llvm/IR/BasicBlock.h:583
Methodvalue> addPass
suite/synctools/tablegen/include/llvm/IR/PassManager.h:548
MethodvalueDefined
Return the value defined by this instruction, if any. This includes dead defs, it is the value created by the instruction's def operands.
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:135
MethodvalueIn
Return the value that is live-in to the instruction. This is the value that will be read by the instruction's use operands. Return NULL if no value is
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:105
MethodvalueInfoFromEdge
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndex.h:1598
MethodvalueOut
Return the value leaving the instruction, if any. This can be a live-through value, or a live def. A dead def returns NULL.
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:123
MethodvalueOutOrDead
Returns the value alive at the end of the instruction, if any. This can be a live-through value, a live def or a dead def.
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:129
Methodvalue_begin
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:987
Methodvalue_end
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:988
Methodvalue_iterator
suite/synctools/tablegen/include/llvm/CodeGen/DIE.h:685
Methodvalue_op_begin
suite/synctools/tablegen/include/llvm/IR/User.h:260
Methodvalue_op_end
suite/synctools/tablegen/include/llvm/IR/User.h:263
Methodvalue_op_iterator
suite/synctools/tablegen/include/llvm/IR/User.h:254
Methodvalue_op_iterator
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:921
Methodvalues
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:989
Methodvarflags
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndex.h:940
Methodvaruint32
(self)
bindings/python/capstone/wasm.py:40
Methodvaruint64
(self)
bindings/python/capstone/wasm.py:44
Methodverify
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:658
Methodverify
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:883
MethodverifyInstruction
Perform target-specific instruction verification.
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:1652
MethodverifyNotInvalidated
suite/synctools/tablegen/include/llvm/IR/PassManager.h:816
MethodverifyRequiredProperties
Returns true if all properties set in V (i.e. required by a pass) are set in this.
suite/synctools/tablegen/include/llvm/CodeGen/MachineFunction.h:208
MethodverifySecLayout
suite/synctools/tablegen/include/llvm/ProfileData/SampleProfWriter.h:348
Methodversion
()
bindings/java/capstone/Capstone.java:462
Functionversion_bind
()
bindings/python/capstone/__init__.py:535
MethodvirtReg2Index
Convert a virtual register number to a 0-based index. The first virtual register in a function will get the index 0.
suite/synctools/tablegen/include/llvm/CodeGen/Register.h:77
MethodvirtRegIndex
Convert a virtual register number to a 0-based index. The first virtual register in a function will get the index 0.
suite/synctools/tablegen/include/llvm/CodeGen/Register.h:103
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