Return true if it is cheap to speculate a call to intrinsic cttz.

Returns true if PhysReg is unallocatable and constant throughout the function. Used by MachineRegisterInfo::isConstantPhysReg().

Shorthand for getKind() != SDep::Data.

Check if \p ID corresponds to a debug info intrinsic.

Returns true if the block is a landing pad. That is this basic block is entered via an exception handler.

Return true if this is an instruction that marks the end of an EH scope, i.e., a catchpad or a cleanuppad instruction.

Test whether this division is known to be exact, with zero remainder.

Return true if an fabs operation is free to the point where it is never worthwhile to replace it with a bitwise operation.

Whether this is the final resolve step before adding a record to the RecordKeeper. Error reporting during resolve and related constant folding should

Return whether this is a piece of an aggregate variable.

Return true if the register is in the allocation of any register class.

Return true if this ACS represents an indirect call.

Returns true if this SUnit refers to a machine instruction as opposed to an SDNode.

Return true if the specified load with extension is legal on this target.

isLogicalImmediate - Return true if the immediate is valid for a logical immediate instruction of the given register size. Return false otherwise.

isMBB - Tests if this is a MO_MachineBasicBlock operand.

isMask_32 - This function returns true if the argument is a sequence of ones starting at the least significant bit with the remainder zero (32 bit ver

isMask_64 - This function returns true if the argument is a sequence of ones starting at the least significant bit with the remainder zero (64 bit ver

This function will return true iff this constant represents the largest value that may be represented by the constant's type. @returns true iff this i

This function will return true iff this constant represents the smallest value that may be represented by this constant's type. @returns true if this

This function will return true iff every bit in this constant is set to true. @returns true iff this constant's bits are all set to true. Determine if

Return true if this instruction is a move immediate (including conditional moves) instruction.

Return true if the specified operation is legal on this target or can be made legal with custom lowering or using promotion. This is used to help guid

Returns true if the given vector is a power of 2.

Check whether the given Opcode is a generic opcode that is not supposed to appear after ISel.

Returns true if this instruction is a candidate for remat. This flag is deprecated, please don't use it anymore. If this flag is set, the isReallyTri

Return true if this instruction is a select instruction.

Returns true if this insert point is set.

Return true if it makes sense to take the size of this type. To get the actual size for a particular target, it is reasonable to use the DataLayout su

Return true if this is a stack slot.

Return true if lowering to a bit test is suitable for a set of case clusters which contains \p NumDests unique destinations, \p Low and \p High as its

Returns true if this instruction part of the terminator for a basic block. Typically this is things like return and branch instructions. Various pass

Return true if the specified condition returns true if the two operands to the condition are equal. Note that if one of the two operands is a NaN, thi

Return true if the op does a truncation before store. For integers this is the same as doing a TRUNCATE and storing the result. For floats, it is the

Returns true if this is a valid index. Invalid indices do not point into an index table, and cannot be compared.

Return true if any actual instruction that defines a value of type FromTy implicitly zero-extends the value to ToTy in the result register. The funct

Check for CPU12 TFR/EXG instruction for valid register

returns APSR with _<bits> qualifier. Note: ARMv7-M deprecates using MSR APSR without a _<bits> qualifier

lookup system register using 12-bit SYSm value. Note: the search is uniqued using M1 mask

Disasemble one instruction at address and store in str_buff */

Disasemble one instruction at pc and store in str_buff */

Match a floating-point negative zero or positive zero. For vectors, this includes constants with undefined elements.