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Functions12,151 in github.com/capstone-engine/capstone

↓ 1 callersMethodgetTargetPassNameFromLegacyName
suite/synctools/tablegen/include/llvm/CodeGen/CodeGenPassBuilder.h:248
↓ 1 callersMethodgetTargetRegisterInfo
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:153
↓ 1 callersFunctiongetThumbImm16ValShift
getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed by a left shift. Returns the shift amount to use.
arch/ARM/ARMAddressingModes.h:257
↓ 1 callersMethodgetTruncStoreAction
Return how this store with truncation should be treated: either it is legal, needs to be promoted to a larger size, needs to be expanded to some other
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:1282
↓ 1 callersMethodgetTypeAllocSizeInBits
Returns the offset in bits between successive objects of the specified type, including alignment padding; always a multiple of 8. If Ty is a scalable
suite/synctools/tablegen/include/llvm/IR/DataLayout.h:519
↓ 1 callersMethodgetTypeAtIndex
suite/synctools/tablegen/include/llvm/IR/DerivedTypes.h:334
↓ 1 callersMethodgetTypeBasedIntrinsicInstrCost
Get intrinsic cost based on argument types. If ScalarizationCostPassed is std::numeric_limits<unsigned>::max(), the cost of scalarizing the arguments
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:1539
↓ 1 callersFunctiongetUndefRegState
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstrBuilder.h:514
↓ 1 callersMethodgetUnit
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:2054
↓ 1 callersMethodgetValue
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:171
↓ 1 callersMethodgetValueOperand
suite/synctools/tablegen/include/llvm/IR/Instructions.h:400
↓ 1 callersFunctiongetValueSymbolTable
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
suite/synctools/tablegen/include/llvm/IR/Function.h:715
↓ 1 callersMethodgetVariable
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:3703
↓ 1 callersMethodgetVectorElementCount
Given a (possibly scalable) vector type, return the ElementCount
suite/synctools/tablegen/include/llvm/CodeGen/ValueTypes.h:323
↓ 1 callersFunctiongetVectorMinNumElements
Given a vector type, return the minimum number of elements it contains.
cs_simple_types.h:687
↓ 1 callersMethodgetVectorSplitCost
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:2238
↓ 1 callersMethodgetVersion
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:495
↓ 1 callersFunctiongetVoidTy
Fetch the type representing void.
suite/synctools/tablegen/include/llvm/IR/IRBuilder.h:555
↓ 1 callersMethodgetWithNewType
For a typed attribute, return the equivalent attribute with the type changed to \p ReplacementTy.
suite/synctools/tablegen/include/llvm/IR/Attributes.h:136
↓ 1 callersFunctionget_am_name
suite/cstest/src/mos65xx_detail.c:7
↓ 1 callersFunctionget_am_name
tests/test_mos65xx.c:32
↓ 1 callersFunctionget_am_name
cstool/cstool_mos65xx.c:7
↓ 1 callersFunctionget_bc_name
suite/cstest/src/ppc_detail.c:7
↓ 1 callersFunctionget_bc_name
tests/test_ppc.c:31
↓ 1 callersFunctionget_bc_name
cstool/cstool_powerpc.c:9
↓ 1 callersFunctionget_bitmv_post_byte_size
If successfull return the additional byte size needed for HD6309 bit move instructions BAND/BEOR/BIAND/BIEOR/BIOR/BOR/LDBT/STBT (including the post by
arch/M680X/M680XDisassembler.c:779
↓ 1 callersFunctionget_eflag_name
suite/cstest/src/x86_detail.c:20
↓ 1 callersFunctionget_eflag_name
(eflag)
bindings/python/tests/test_x86.py:24
↓ 1 callersFunctionget_eflag_name
tests/test_x86.c:34
↓ 1 callersFunctionget_eflag_name
cstool/cstool_x86.c:11
↓ 1 callersFunctionget_filename_ext
suite/cstest/src/helper.c:54
↓ 1 callersFunctionget_first_insn
(filename)
suite/synctools/instrinfo.py:33
↓ 1 callersFunctionget_fpu_flag_name
suite/cstest/src/x86_detail.c:142
↓ 1 callersFunctionget_fpu_flag_name
tests/test_x86.c:134
↓ 1 callersFunctionget_fpu_flag_name
cstool/cstool_x86.c:133
↓ 1 callersFunctionget_indexed09_post_byte_size
If successfull return the additional byte size needed for M6809 indexed addressing mode (including the indexed addressing post_byte). On error return
arch/M680X/M680XDisassembler.c:633
↓ 1 callersFunctionget_loop_post_byte_size
If successfull return the additional byte size needed for CPU12 loop instructions DBEQ/DBNE/IBEQ/IBNE/TBEQ/TBNE (including the post byte). On error re
arch/M680X/M680XDisassembler.c:756
↓ 1 callersFunctionget_report_folder
(toolpath, folderpath, details, cmt_out)
suite/cstest/cstest_report.py:69
↓ 1 callersFunctionget_unsigned
arch/M680X/M680XInstPrinter.c:117
↓ 1 callersFunctionget_varint7
input | code : code pointer start from varint7 | code_len : start from the code pointer to the end, how long is it | leng : length of the param , -1 m
arch/WASM/WASMDisassembler.c:355
↓ 1 callersFunctionget_varuint64
input | code : code pointer start from varuint64 | code_len : real code len count from varint | leng: return value, means length of varint. -1 means
arch/WASM/WASMDisassembler.c:307
↓ 1 callersMethodhandleDisconnectEdge
suite/synctools/tablegen/include/llvm/CodeGen/RegAllocPBQP.h:314
↓ 1 callersMethodhandleReconnectEdge
suite/synctools/tablegen/include/llvm/CodeGen/RegAllocPBQP.h:321
↓ 1 callersMethodhandleRemoveNode
suite/synctools/tablegen/include/llvm/CodeGen/RegAllocPBQP.h:306
↓ 1 callersMethodhandleSetNodeCosts
suite/synctools/tablegen/include/llvm/CodeGen/RegAllocPBQP.h:307
↓ 1 callersMethodhandleUpdateCosts
suite/synctools/tablegen/include/llvm/CodeGen/RegAllocPBQP.h:327
↓ 1 callersMethodhasAllowContract
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:430
↓ 1 callersMethodhasAllowReassoc
Test if this operation may be simplified with reassociative transforms.
suite/synctools/tablegen/include/llvm/IR/Operator.h:347
↓ 1 callersMethodhasAllowReciprocal
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:429
↓ 1 callersMethodhasApproxFunc
Test if this operation allows approximations of math library functions or intrinsics.
suite/synctools/tablegen/include/llvm/IR/Operator.h:378
↓ 1 callersMethodhasCSIRLevelProfile
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:292
↓ 1 callersFunctionhasCallSiteBeginLabel
Return true if the begin label has a call site number associated with it.
suite/synctools/tablegen/include/llvm/CodeGen/MachineFunction.h:1160
↓ 1 callersFunctionhasCallSiteLandingPad
Return true if the landing pad Eh symbol has an associated call site.
suite/synctools/tablegen/include/llvm/CodeGen/MachineFunction.h:1143
↓ 1 callersMethodhasContext
suite/synctools/tablegen/include/llvm/ProfileData/SampleProf.h:568
↓ 1 callersMethodhasDebugOperandForReg
Returns whether this debug value has at least one debug operand with the register \p Reg.
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:528
↓ 1 callersMethodhasIndex
Returns true if the given machine instr is mapped to an index, otherwise returns false.
suite/synctools/tablegen/include/llvm/CodeGen/SlotIndexes.h:380
↓ 1 callersFunctionhasMinSize
Optimize this function for minimum size (-Oz).
suite/synctools/tablegen/include/llvm/IR/Function.h:658
↓ 1 callersMethodhasName
All values can potentially be named.
suite/synctools/tablegen/include/llvm/IR/Value.h:261
↓ 1 callersMethodhasNoInfs
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:427
↓ 1 callersMethodhasNoNaNs
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:426
↓ 1 callersMethodhasNoSignedWrap
Test whether this operation is known to never undergo signed overflow, aka the nsw property.
suite/synctools/tablegen/include/llvm/IR/Operator.h:101
↓ 1 callersMethodhasNoSignedZeros
Test if this operation can ignore the sign of zero.
suite/synctools/tablegen/include/llvm/IR/Operator.h:362
↓ 1 callersMethodhasNoSignedZeros
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:428
↓ 1 callersMethodhasNoUnsignedWrap
Test whether this operation is known to never undergo unsigned overflow, aka the nuw property.
suite/synctools/tablegen/include/llvm/IR/Operator.h:95
↓ 1 callersFunctionhasPersonalityFn
Check whether this function has a personality function.
suite/synctools/tablegen/include/llvm/IR/Function.h:775
↓ 1 callersFunctionhasRegisterOptions
suite/synctools/tablegen/include/llvm/CodeGen/PBQP/ReductionRules.h:151
↓ 1 callersMethodhasReplaceableUses
Whether this contains RAUW support.
suite/synctools/tablegen/include/llvm/IR/Metadata.h:852
↓ 1 callersMethodhasSingleByteCoverage
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:304
↓ 1 callersMethodhasSubClass
Return true if the specified TargetRegisterClass is a proper sub-class of this TargetRegisterClass.
suite/synctools/tablegen/include/llvm/CodeGen/TargetRegisterInfo.h:121
↓ 1 callersMethodhasSubClassEq
Returns true if RC is a sub-class of or equal to this class.
suite/synctools/tablegen/include/llvm/CodeGen/TargetRegisterInfo.h:126
↓ 1 callersMethodhasTrivialDestructor
Check whether this has a trivial destructor. If \c MD isn't replaceable, the destructor will be a no-op.
suite/synctools/tablegen/include/llvm/IR/TrackingMDRef.h:75
↓ 1 callersFunctionhasUWTable
True if the ABI mandates (or the user requested) that this function be in a unwind table.
suite/synctools/tablegen/include/llvm/IR/Function.h:628
↓ 1 callersMethodhasValidDepth
Returns true if the depth resources have been computed from the trace above this block.
suite/synctools/tablegen/include/llvm/CodeGen/MachineTraceMetrics.h:182
↓ 1 callersFunctionhasWasmLandingPadIndex
Returns true if the landing pad has an associate index in wasm EH.
suite/synctools/tablegen/include/llvm/CodeGen/MachineFunction.h:1125
↓ 1 callersMethodhex
(int i)
bindings/java/TestArm64.java:26
↓ 1 callersMethodhex
(int i)
bindings/java/TestArm.java:29
↓ 1 callersMethodhexString2Byte
(String s)
bindings/java/TestXcore.java:10
↓ 1 callersMethodhexString2Byte
(String s)
bindings/java/TestArm64.java:11
↓ 1 callersMethodhexString2Byte
(String s)
bindings/java/TestSystemz.java:11
↓ 1 callersMethodhexString2Byte
(String s)
bindings/java/TestPpc.java:11
↓ 1 callersMethodidx_begin
suite/synctools/tablegen/include/llvm/IR/Operator.h:501
↓ 1 callersFunctionimmediate_hdlr
arch/M680X/M680XDisassembler.c:1534
↓ 1 callersMethodincrement
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstrBundleIterator.h:95
↓ 1 callersMethodinput_size
suite/synctools/tablegen/include/llvm/IR/InstrTypes.h:1148
↓ 1 callersMethodinsert
Add the specified instruction to the worklist if it isn't already in it.
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/GISelWorkList.h:74
↓ 1 callersMethodinsertAfter
Insert MI into the instruction list after I.
suite/synctools/tablegen/include/llvm/CodeGen/MachineBasicBlock.h:888
↓ 1 callersMethodinstrEntryBBEnabled
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:296
↓ 1 callersMethodinvalidEdgeId
Returns a value representing an invalid (non-existent) edge.
suite/synctools/tablegen/include/llvm/CodeGen/PBQP/Graph.h:37
↓ 1 callersMethodinvalidate
The model delegates to the \c ResultT method.
suite/synctools/tablegen/include/llvm/IR/PassManagerInternal.h:257
↓ 1 callersMethodinvalidate
MMI owes MCContext. It should never be invalidated.
suite/synctools/tablegen/include/llvm/CodeGen/MachineModuleInfo.h:272
↓ 1 callersFunctionis16BitEquivalent
* is16BitEquivalent - Determines whether two instruction names refer to * equivalent instructions but one is 16-bit whereas the other is not. * * @
arch/X86/X86DisassemblerDecoder.c:941
↓ 1 callersFunctionis64Bit
* is64Bit - Determines whether this instruction is a 64-bit instruction. * * @param name - The instruction that is not 16-bit */
arch/X86/X86DisassemblerDecoder.c:961
↓ 1 callersMethodisArtificial
Tests if this is an Order dependence that is marked as "artificial", meaning it isn't necessary for correctness.
suite/synctools/tablegen/include/llvm/CodeGen/ScheduleDAG.h:200
↓ 1 callersFunctionisBOCTRBranch
arch/PowerPC/PPCInstPrinter.c:404
↓ 1 callersMethodisBinaryOp
suite/synctools/tablegen/include/llvm/IR/Instruction.h:163
↓ 1 callersMethodisBlock
isBlock - Returns true if this is a block boundary slot.
suite/synctools/tablegen/include/llvm/CodeGen/SlotIndexes.h:226
↓ 1 callersMethodisBundled
Return true if this instruction part of a bundle. This is true if either itself or its following instruction is marked "InsideBundle".
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:391
↓ 1 callersMethodisCall
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:823
↓ 1 callersMethodisCallbackCall
Return true if this ACS represents a callback call.
suite/synctools/tablegen/include/llvm/IR/AbstractCallSite.h:125
↓ 1 callersMethodisCheapToSpeculateCtlz
Return true if it is cheap to speculate a call to intrinsic ctlz.
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:618
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