given internal insn id, return public instruction info

stw sed, sp[3]

map internal raw register to 'public' register

abs64 - absolute value of a 64-bit int. Not all environments support "abs" on whatever their name for the 64-bit int type is. The absolute value of

For a machine instruction \p MI, adds all register units used in \p UsedRegUnits and defined or clobbered in \p ModifiedRegUnits. This is useful when

Return an iterator to the begining of the arguments to the underlying call

Return an end iterator of the arguments to the underlying call

Return the number of arguments to the underlying call.

range adapter for actual call arguments

copy indicates whether we need to copy the underlying memory for the input Name.

Tells the code generator which bitwidths to bypass.

Start tracking the arguments passed to the call \p CallI.

Add the specified symbol to the list of valid catchret targets for Windows EHCont Guard.

Adds dependencies as needed from all SUs in list to SU.

Record annotations associated with a particular label.

This is called when a count is seen in the profile.

Adds custom features for a visualization of the ScheduleDAG.

adds the dereferenceable attribute to the list of attributes.

adds the dereferenceable attribute to the list of attributes.

Mark domain as available.

Update the symtab by adding \p FuncName to the table. This interface is used by the raw and text profile readers.

This method should install a (global) instruction selector pass, which converts possibly generic instructions to fully target-specific instructions, t

Add a global value summary for a value.

Add passes that optimize instruction level parallelism for out-of-order targets. These passes are run while the machine code is still in SSA form, so

This method should install an IR translator pass, which converts from LLVM code to machine instructions with possibly generic opcodes.

Add information about parameter that is kept in registers.

Add an incoming value to the end of the PHI list

Add Manager into the list of managers that are not directly maintained by this top level pass manager

addInstSelector - This method should install an instruction selector pass, which converts from LLVM code to machine instructions.

This method should install a legalize pass, which converts the instruction sequence into one that can be selected by the target.

Adds the specified register as a live in. Note that it is an error to add the same register to the same set more than once unless the intention is to

addLiveIn - Add the specified register as a live-in. Note that it is an error to add the same register to the same set more than once.

addLiveInBlock - Add a block with an unknown live-in value. This function can only be called once per basic block. Once the live-in value has been d

Add the specified symbol to the list of valid longjmp targets for Windows Control Flow Guard.

Add a new module with the given \p Hash, mapped to the given \p ModID, and return a reference to the module.

Add a postprocessing step to the DAG builder. Mutations are applied in the order that they are added after normal DAG building and before MachineSched

addNewBlock - Add a new node to the dominator tree information. This creates a new node as a child of DomBB dominator node,linking it into the childr

Adds an observer.

Add an original name for the value of the given GUID.

Add a new region that will be outlined later.

Add passes to the specified pass manager to get the specified file emitted. Typically this will involve several steps of code generation. This method

Add passes to the specified pass manager to get machine code emitted with the MCJIT. This method returns true if machine code is not supported. It fil

addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used. This corresponds to the bit mask attached to register mask operands.

addPostFastRegAllocRewrite - Add passes to the optimized register allocation pipeline after fast register allocation is complete.

This method may be implemented by targets that want to run passes after register allocation pass pipeline but before prolog-epilog insertion.

Add passes to be run immediately after virtual registers are rewritten to physical registers.