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Functions12,151 in github.com/capstone-engine/capstone

MethodaddPreEmitPass
This pass may be implemented by targets that want to run passes immediately before machine code is emitted.
suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h:436
MethodaddPreEmitPass2
Targets may add passes immediately before machine code is emitted in this callback. This is called even later than `addPreEmitPass`. FIXME: Rename `ad
suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h:443
MethodaddPreGlobalInstructionSelect
This method may be implemented by targets that want to run passes immediately before the (global) instruction selection.
suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h:266
MethodaddPreISel
addPreISelPasses - This method should add any "last minute" LLVM->LLVM passes (which are run just before instruction selector).
suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h:357
MethodaddPreLegalizeMachineIR
This method may be implemented by targets that want to run passes immediately before legalization.
suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h:249
MethodaddPreRegAlloc
This method may be implemented by targets that want to run passes immediately before register allocation.
suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h:377
MethodaddPreRegBankSelect
This method may be implemented by targets that want to run passes immediately before the register bank selection.
suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h:257
MethodaddPreRewrite
addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is complete, but before virtual registers are rewri
suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h:403
MethodaddPreSched2
This method may be implemented by targets that want to run passes after prolog-epilog insertion and before the second instruction scheduling pass.
suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h:424
MethodaddPredBarrier
Adds a barrier edge to SU by calling addPred(), with latency 0 generally or latency 1 for a store followed by a load.
suite/synctools/tablegen/include/llvm/CodeGen/ScheduleDAG.h:384
MethodaddRecord
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfWriter.h:56
MethodaddRegAllocPass
suite/synctools/tablegen/include/llvm/CodeGen/CodeGenPassBuilder.h:1012
MethodaddRegAllocationHint
addRegAllocationHint - Add a register allocation hint to the hints vector for VReg.
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:774
MethodaddRegBankSelect
This method should install a register bank selector pass, which assigns register banks to virtual registers without a register class or register banks
suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h:262
MethodaddRegMasked
Adds register units covered by physical register \p Reg that are part of the lanemask \p Mask.
suite/synctools/tablegen/include/llvm/CodeGen/LiveRegUnits.h:93
MethodaddRegisterClass
Add the specified register class as an available regclass for the specified value type. This indicates the selector can handle values of that class na
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:2214
MethodaddRetAttr
Adds the attribute to the return value.
suite/synctools/tablegen/include/llvm/IR/InstrTypes.h:1518
MethodaddRetAttributes
suite/synctools/tablegen/include/llvm/IR/Attributes.h:531
MethodaddRoot
suite/synctools/tablegen/include/llvm/CodeGen/MachineDominators.h:30
MethodaddRunOnModule
suite/synctools/tablegen/include/llvm/CodeGen/MachinePassManager.h:219
MethodaddSafePoint
addSafePoint - Notes the existence of a safe point. Num is the ID of the label just prior to the safe point (if the code generator is using MachineMod
suite/synctools/tablegen/include/llvm/CodeGen/GCMetadata.h:125
MethodaddScavengingFrameIndex
Add a scavenging frame index.
suite/synctools/tablegen/include/llvm/CodeGen/RegisterScavenging.h:123
MethodaddSectionFlag
suite/synctools/tablegen/include/llvm/ProfileData/SampleProfWriter.h:238
MethodaddShadow
suite/synctools/tablegen/include/llvm/TableGen/Record.h:2092
MethodaddSrcEdge
suite/synctools/tablegen/include/llvm/ProfileData/GCOV.h:287
MethodaddSrcToMIB
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h:141
MethodaddStackRoot
addStackRoot - Registers a root that lives on the stack. Num is the stack object ID for the alloca (if the code generator is using MachineFrameInfo).
suite/synctools/tablegen/include/llvm/CodeGen/GCMetadata.h:113
MethodaddSuccessorWithProb
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:599
MethodaddSuperClass
suite/synctools/tablegen/include/llvm/TableGen/Record.h:1667
MethodaddTargetFlag
suite/synctools/tablegen/include/llvm/CodeGen/MachineOperand.h:229
MethodaddTemplateArg
suite/synctools/tablegen/include/llvm/TableGen/Record.h:1614
MethodaddToFrontier
suite/synctools/tablegen/include/llvm/CodeGen/MachineDominanceFrontier.h:84
FunctionaddToMBBNumbering
Adds the MBB to the internal numbering. Returns the unique number assigned to the MBB.
suite/synctools/tablegen/include/llvm/CodeGen/MachineFunction.h:878
MethodaddToPacket
addToPacket - Add MI to the current packet.
suite/synctools/tablegen/include/llvm/CodeGen/DFAPacketizer.h:143
MethodaddTopLevelLoop
This adds the specified loop to the collection of top-level loops.
suite/synctools/tablegen/include/llvm/CodeGen/MachineLoopInfo.h:172
MethodaddTotalSamples
suite/synctools/tablegen/include/llvm/ProfileData/SampleProf.h:698
MethodaddTrait
Add the trait \p Property to the required trait set. \p RawString is the string we parsed and derived \p Property from. If \p Score is not null, it re
suite/synctools/tablegen/include/llvm/Frontend/OpenMP/OMPContext.h:124
MethodaddTrait
suite/synctools/tablegen/include/llvm/Frontend/OpenMP/OMPContext.h:161
MethodaddTypeTest
Add a type test to the summary. This is used by WholeProgramDevirt if we were unable to devirtualize a checked call.
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndex.h:827
MethodaddValue
suite/synctools/tablegen/include/llvm/TableGen/Record.h:1619
MethodaddValue
suite/synctools/tablegen/include/llvm/CodeGen/DIE.h:713
MethodaddVirtualRegisterDead
addVirtualRegisterDead - Add information about the fact that the specified register is dead after being used by the specified instruction. If AddIfNot
suite/synctools/tablegen/include/llvm/CodeGen/LiveVariables.h:242
MethodaddVirtualRegisterKilled
addVirtualRegisterKilled - Add information about the fact that the specified register is killed after being used by the specified instruction. If AddI
suite/synctools/tablegen/include/llvm/CodeGen/LiveVariables.h:206
Methodaddr
suite/synctools/tablegen/include/llvm/CodeGen/RDFGraph.h:656
MethodaddrSinkUsingGEPs
\brief Sink addresses into blocks using GEP instructions rather than pointer casts and arithmetic.
suite/synctools/tablegen/include/llvm/CodeGen/TargetSubtargetInfo.h:286
Methodaddress
(self)
bindings/python/capstone/__init__.py:652
MethodadjustCallTargets
Prorate call targets by a distribution factor.
suite/synctools/tablegen/include/llvm/ProfileData/SampleProf.h:380
MethodadjustForHiPEPrologue
Adjust the prologue to add Erlang Run-Time System (ERTS) specific code in the assembly prologue to explicitly handle the stack.
suite/synctools/tablegen/include/llvm/CodeGen/TargetFrameLowering.h:236
MethodadjustForSegmentedStacks
Adjust the prologue to have the function use segmented stacks. This works by adding a check even before the "normal" function prologue.
suite/synctools/tablegen/include/llvm/CodeGen/TargetFrameLowering.h:231
MethodadjustInliningThreshold
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:489
MethodadjustPassManager
Allow the target to modify the pass manager, e.g. by calling PassManagerBuilder::addExtension.
suite/synctools/tablegen/include/llvm/Target/TargetMachine.h:350
MethodadjustSchedDependency
Perform target-specific adjustments to the latency of a schedule dependency. If a pair of operands is associated with the schedule dependency, DefOpId
suite/synctools/tablegen/include/llvm/CodeGen/TargetSubtargetInfo.h:233
MethodadjustStackMapLiveOutMask
Prior to adding the live-out mask to a stackmap or patchpoint instruction, provide the target the opportunity to adjust it (mainly to remove pseudo-re
suite/synctools/tablegen/include/llvm/CodeGen/TargetRegisterInfo.h:573
MethodadjustsStack
Return true if this function adjusts the stack -- e.g., when calling another function. This is only valid during and after prolog/epilog code insertio
suite/synctools/tablegen/include/llvm/CodeGen/MachineFrameInfo.h:576
Methodadvance
suite/synctools/tablegen/include/llvm/CodeGen/ScoreboardHazardRecognizer.h:77
Methodadvance
If the operands on InstrI are exhausted, advance InstrI to the next bundled instruction with operands.
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstrBundle.h:102
Methodadvance
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:1025
Methodadvance
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:1133
FunctionadvanceByOne
suite/synctools/tablegen/include/llvm/ProfileData/Coverage/CoverageMapping.h:854
MethodadvanceByOne
suite/synctools/tablegen/include/llvm/ProfileData/Coverage/CoverageMapping.h:898
MethodadvanceByOne
suite/synctools/tablegen/include/llvm/ProfileData/Coverage/CoverageMapping.h:956
FunctionadvanceByOneOutOfLine
suite/synctools/tablegen/include/llvm/ProfileData/Coverage/CoverageMapping.h:811
MethodadvanceData
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:349
MethodadvanceMBBIndex
Move iterator to the next IdxMBBPair where the SlotIndex is greater or equal to \p To.
suite/synctools/tablegen/include/llvm/CodeGen/SlotIndexes.h:491
MethodadvancePastNonTerminators
suite/synctools/tablegen/include/llvm/IR/CFG.h:55
MethodadvanceTo
advanceTo - Advance the specified iterator to point to the Segment containing the specified position, or end() if the position is past the end of the
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:263
MethodadvanceToNextBB
suite/synctools/tablegen/include/llvm/IR/InstIterator.h:110
MethodadvanceToNextKey
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:485
MethodadvanceToValidPosition
suite/synctools/tablegen/include/llvm/CodeGen/MachineBasicBlock.h:483
MethodaggressivelyPreferBuildVectorSources
Return true if it is profitable to use a scalar input to a BUILD_VECTOR even if the vector itself has multiple uses.
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:2918
Methodalias
suite/synctools/tablegen/include/llvm/CodeGen/RDFRegisters.h:118
MethodaliasTo
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h:553
Functionalias_empty
suite/synctools/tablegen/include/llvm/IR/Module.h:647
Functionalias_size
suite/synctools/tablegen/include/llvm/IR/Module.h:646
Functionaliases
suite/synctools/tablegen/include/llvm/IR/Module.h:649
MethodalignLoopsWithOptSize
Should loops be aligned even when the function is marked OptSize (but not MinSize).
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:1811
MethodalignSPAdjust
alignSPAdjust - This method aligns the stack adjustment to the correct alignment.
suite/synctools/tablegen/include/llvm/CodeGen/TargetFrameLowering.h:105
Methodall
Construct a special preserved set that preserves all passes.
suite/synctools/tablegen/include/llvm/IR/PassManager.h:158
MethodallAnalysesInSetPreserved
suite/synctools/tablegen/include/llvm/IR/PassManager.h:335
MethodallInComplete
suite/synctools/tablegen/include/llvm/TableGen/Record.h:540
MethodallInSet
suite/synctools/tablegen/include/llvm/IR/PassManager.h:166
MethodallUsesReplacedWith
Callback for Value RAUW. Called when this->getValPtr()->replaceAllUsesWith(new_value) is called, _before_ any of the uses have actually been replaced
suite/synctools/tablegen/include/llvm/IR/ValueHandle.h:423
MethodallUsesReplacedWith
Handle RAUW by poisoning the handle.
suite/synctools/tablegen/include/llvm/IR/ValueHandle.h:476
MethodallUsesReplacedWith
suite/synctools/tablegen/include/llvm/IR/ValueMap.h:271
Methodallnodes
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAG.h:508
Methodallnodes_size
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAG.h:504
MethodallocHungoffUses
allocHungoffUses - this is more complicated than the generic User::allocHungoffUses, because we have to allocate Uses for the incoming values and poin
suite/synctools/tablegen/include/llvm/IR/Instructions.h:2689
FunctionallocSummary
suite/synctools/tablegen/include/llvm/ProfileData/InstrProf.h:1114
FunctionallocateAllRegClasses
Default register class filter function for register allocation. All virtual registers should be allocated.
suite/synctools/tablegen/include/llvm/CodeGen/RegAllocCommon.h:24
FunctionallocateOperandArray
Allocate an array of MachineOperands. This is only intended for use by internal MachineInstr functions.
suite/synctools/tablegen/include/llvm/CodeGen/MachineFunction.h:981
MethodallowContract
suite/synctools/tablegen/include/llvm/IR/Operator.h:215
MethodallowExtraAnalysis
Whether we allow for extra compile-time budget to perform more analysis to be more informative. This is useful to enable additional missed optimizati
suite/synctools/tablegen/include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h:166
MethodallowOverlap
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:163
MethodallowReassoc
Flag queries
suite/synctools/tablegen/include/llvm/IR/Operator.h:210
MethodallowReciprocal
suite/synctools/tablegen/include/llvm/IR/Operator.h:214
MethodallowTruncateForTailCall
Return true if a truncation from FromTy to ToTy is permitted when deciding whether a call is in tail position. Typically this means that both results
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:2559
MethodallowsMisalignedMemoryAccesses
\name Scalar TTI Implementations @{
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:252
MethodallowsMisalignedMemoryAccesses
Determine if the target supports unaligned memory accesses. This function returns true if the target allows unaligned memory accesses of the specifie
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:1671
Methodalways
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h:448
MethodanalyzeBranch
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e.g. it's a switch dispatch or isn't implemented for a target
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:627
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