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Functions12,151 in github.com/capstone-engine/capstone

Methodimm
(self)
bindings/python/capstone/arm.py:44
MethodimmIdx
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h:561
Functionimm_idx12_x_hdlr
arch/M680X/M680XDisassembler.c:1705
Functionimm_rel_hdlr
arch/M680X/M680XDisassembler.c:1662
Methodimm_unsigned
(self)
bindings/python/capstone/__init__.py:1102
Methodimmediate
(self)
bindings/python/capstone/wasm.py:56
Methodimplicit_operands
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:632
MethodimproveShuffleKindFromMask
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:839
Methodincoming_values
suite/synctools/tablegen/include/llvm/IR/Instructions.h:2740
MethodincreasesLength
Return true if this shuffle returns a vector with a greater number of elements than its source vectors. Example: shufflevector <2 x n> A, <2 x n> B, <
suite/synctools/tablegen/include/llvm/IR/Instructions.h:2105
Methodincrement
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:2737
Methodincrement
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstrBundleIterator.h:69
MethodincrementWeight
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:713
Methodindex2StackSlot
Convert a non-negative frame index to a stack slot register value.
suite/synctools/tablegen/include/llvm/CodeGen/Register.h:58
Methodindex2VirtReg
Convert a 0-based index to a virtual register number. This is the inverse operation of VirtReg2IndexFunctor below.
suite/synctools/tablegen/include/llvm/CodeGen/Register.h:84
MethodindexValid
suite/synctools/tablegen/include/llvm/IR/DerivedTypes.h:336
Functionindex_hdlr
arch/M680X/M680XDisassembler.c:1504
Methodindex_is_valid
suite/synctools/tablegen/include/llvm/IR/CFG.h:153
Methodindex_iterator
suite/synctools/tablegen/include/llvm/IR/Attributes.h:866
Functionindexed09_hdlr
M6809/M6309 indexed mode handler
arch/M680X/M680XDisassembler.c:1274
FunctionindexedS16_hdlr
arch/M680X/M680XDisassembler.c:1678
FunctionindexedS_hdlr
arch/M680X/M680XDisassembler.c:1668
FunctionindexedX0_hdlr
arch/M680X/M680XDisassembler.c:1646
FunctionindexedX0p_hdlr
arch/M680X/M680XDisassembler.c:1689
FunctionindexedX16_hdlr
arch/M680X/M680XDisassembler.c:1652
FunctionindexedX_hdlr
M6800/1/2/3 indexed mode handler
arch/M680X/M680XDisassembler.c:1253
FunctionindexedXp_hdlr
arch/M680X/M680XDisassembler.c:1695
FunctionindexedY_hdlr
arch/M680X/M680XDisassembler.c:1263
Methodindexes
Use this to iterate over the valid attribute indexes.
suite/synctools/tablegen/include/llvm/IR/Attributes.h:886
Methodindices
suite/synctools/tablegen/include/llvm/IR/Instructions.h:1045
Methodindices
suite/synctools/tablegen/include/llvm/IR/Instructions.h:2452
Methodindices
suite/synctools/tablegen/include/llvm/IR/Instructions.h:2572
Methodindices
suite/synctools/tablegen/include/llvm/IR/Operator.h:506
Functioninherent_hdlr
arch/M680X/M680XDisassembler.c:1049
Methodinit
suite/synctools/tablegen/include/llvm/IR/Instructions.h:1755
Methodinit
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:680
Methodinit
suite/synctools/tablegen/include/llvm/CodeGen/LiveIntervalUnion.h:148
Methodinit
suite/synctools/tablegen/include/llvm/CodeGen/VLIWMachineScheduler.h:155
Methodinit
suite/synctools/tablegen/include/llvm/CodeGen/IndirectThunks.h:34
Methodinit
(re-)initializes and clears the set.
suite/synctools/tablegen/include/llvm/CodeGen/LivePhysRegs.h:66
Methodinit
suite/synctools/tablegen/include/llvm/CodeGen/SwitchLoweringUtils.h:253
Methodinit
Initialize and clear the set.
suite/synctools/tablegen/include/llvm/CodeGen/LiveRegUnits.h:73
MethodinitLRU
Compute the registers that are live across this Candidate. Used by targets that need this information for cost model calculation. If a target does not
suite/synctools/tablegen/include/llvm/CodeGen/MachineOutliner.h:139
MethodinitLiveThru
Copy an existing live thru pressure result.
suite/synctools/tablegen/include/llvm/CodeGen/RegisterPressure.h:451
MethodinitNodes
suite/synctools/tablegen/include/llvm/CodeGen/LatencyPriorityQueue.h:52
MethodinitPacketizerState
Perform initialization before packetizing an instruction. This function is supposed to be overrided by the target dependent packetizer.
suite/synctools/tablegen/include/llvm/CodeGen/DFAPacketizer.h:157
MethodinitPolicy
Optionally override the per-region scheduling policy.
suite/synctools/tablegen/include/llvm/CodeGen/MachineScheduler.h:213
MethodinitPolicy
suite/synctools/tablegen/include/llvm/CodeGen/MachineScheduler.h:1046
Methodinitialize
suite/synctools/tablegen/include/llvm/IR/LegacyPassNameParser.h:47
Methodinitialize
Initialize the stack protector descriptor structure for a new basic block.
suite/synctools/tablegen/include/llvm/CodeGen/CodeGenCommonISel.h:131
Methodinitialize
suite/synctools/tablegen/include/llvm/CodeGen/MachinePassRegistry.h:144
MethodinitializeAnalysisInfo
Initialize available analysis information.
suite/synctools/tablegen/include/llvm/IR/LegacyPassManagers.h:335
MethodinitializeSplitCSR
Perform necessary initialization to handle a subset of CSRs explicitly via copies. This function is called at the beginning of instruction selection.
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:3783
MethodinlineStackProbe
Replace a StackProbe stub (if any) with the actual probe code inline
suite/synctools/tablegen/include/llvm/CodeGen/TargetFrameLowering.h:223
Methodinput
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:52
Methodinput
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:73
Methodinput
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:93
Methodinput
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:117
Methodinput
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:150
Methodinput
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:166
Methodinput
suite/synctools/tablegen/include/llvm/CodeGen/MIRYamlMapping.h:406
MethodinputOne
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndexYAML.h:66
MethodinputOne
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndexYAML.h:116
MethodinputOne
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndexYAML.h:207
MethodinputOne
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndexYAML.h:267
Methodinput_begin
suite/synctools/tablegen/include/llvm/IR/InstrTypes.h:1149
Methodinput_end
suite/synctools/tablegen/include/llvm/IR/InstrTypes.h:1150
Methodinputs
suite/synctools/tablegen/include/llvm/IR/InstrTypes.h:1144
Methodinsert
suite/synctools/tablegen/include/llvm/CodeGen/MachineBasicBlock.h:872
Methodinsert
Mark the \p Pair.LaneMask lanes of \p Pair.Reg as live. Returns the previously live lanes of \p Pair.Reg.
suite/synctools/tablegen/include/llvm/CodeGen/RegisterPressure.h:305
Methodinsert
suite/synctools/tablegen/include/llvm/CodeGen/MachinePipeliner.h:345
Methodinsert
Insert \p MI in the just before ::getPoint()
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/RegBankSelect.h:180
MethodinsertAfterBundle
If I is bundled then insert MI into the instruction list after the end of the bundle, otherwise insert MI immediately after I.
suite/synctools/tablegen/include/llvm/CodeGen/MachineBasicBlock.h:898
MethodinsertBranch
Insert branch code into the end of the specified MachineBasicBlock. The operands to this method are the same as those returned by analyzeBranch. This
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:698
MethodinsertCopiesSplitCSR
Insert explicit copies in entry and exit blocks. We copy a subset of CSRs to virtual registers in the entry block, and copy them back to physical regi
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:3791
MethodinsertIndirectBranch
Insert an unconditional indirect branch at the end of \p MBB to \p NewDestBB. Optionally, insert the clobbered register restoring in \p RestoreBB. \p
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:592
MethodinsertMBBInMaps
suite/synctools/tablegen/include/llvm/CodeGen/LiveIntervals.h:259
MethodinsertMBBInMaps
Add the given MachineBasicBlock into the maps. If it contains any instructions then they must already be in the maps. This is used after a block has b
suite/synctools/tablegen/include/llvm/CodeGen/SlotIndexes.h:610
MethodinsertOffsets
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:128
MethodinsertOutlinedCall
Insert a call to an outlined function into the program. Returns an iterator to the spot where we inserted the call. This must be implemented by the ta
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:1942
MethodinsertPass
suite/synctools/tablegen/include/llvm/CodeGen/CodeGenPassBuilder.h:219
MethodinsertSelect
Insert a select instruction into MBB before I that will copy TrueReg to DstReg when Cond is true, and FalseReg to DstReg when Cond is false. This fun
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:899
MethodinsertUnconditionalBranch
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:706
MethodinsertVRegByName
suite/synctools/tablegen/include/llvm/CodeGen/MachineRegisterInfo.h:432
MethodinsertVRegs
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/IRTranslator.h:118
MethodinsnName
()
bindings/java/capstone/Capstone.java:240
Methodinsn_name
(self, default=None)
bindings/python/capstone/__init__.py:809
MethodinstCombineIntrinsic
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:591
MethodinstCount
Get the instruction count recorded for this function.
suite/synctools/tablegen/include/llvm/IR/ModuleSummaryIndex.h:749
MethodinstrEntryBBEnabled
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:211
MethodinstrEntryBBEnabled
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:505
MethodinstrEntryBBEnabled
suite/synctools/tablegen/include/llvm/ProfileData/InstrProfReader.h:573
Methodinstr_rbegin
suite/synctools/tablegen/include/llvm/CodeGen/MachineBasicBlock.h:260
Methodinstr_rend
suite/synctools/tablegen/include/llvm/CodeGen/MachineBasicBlock.h:262
Methodinstrs
suite/synctools/tablegen/include/llvm/CodeGen/MachineBasicBlock.h:267
Functioninstructions
suite/synctools/tablegen/include/llvm/IR/InstIterator.h:133
FunctioninstructionsWithoutDebug
suite/synctools/tablegen/include/llvm/CodeGen/MachineBasicBlock.h:1261
Methodint7
(self)
bindings/python/capstone/wasm.py:36
Methodint_wrapper
suite/synctools/tablegen/include/llvm/IR/Attributes.h:868
Methodintersect
Given two sets of AAMDNodes that apply to the same pointer, give the best AAMDNodes that are compatible with both (i.e. a set of nodes whose allowable
suite/synctools/tablegen/include/llvm/IR/Metadata.h:694
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