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Functions12,151 in github.com/capstone-engine/capstone

MethodisKnownNeverSNaN
\returns true if \p Op is known to never be a signaling NaN.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAG.h:1896
MethodisLE
Return true if the predicate is SLE or ULE.
suite/synctools/tablegen/include/llvm/IR/Instructions.h:1322
MethodisLSRCostLess
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:327
MethodisLT
Return true if the predicate is SLT or ULT.
suite/synctools/tablegen/include/llvm/IR/Instructions.h:1310
MethodisLValueReference
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:742
MethodisLValueReference
Check if this is reference-qualified. Return true if this subprogram is a C++11 reference-qualified non-static member function (void foo() &).
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:2022
MethodisLabel
Returns true if the MachineInstr represents a label.
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:1189
MethodisLabelTy
Return true if this is 'label'.
suite/synctools/tablegen/include/llvm/IR/Type.h:181
MethodisLastFinalizationInfoCancellable
Return true if the last entry in the finalization stack is of kind \p DK and cancellable.
suite/synctools/tablegen/include/llvm/Frontend/OpenMP/OMPIRBuilder.h:733
MethodisLatencyBound
suite/synctools/tablegen/include/llvm/CodeGen/VLIWMachineScheduler.h:199
MethodisLegal
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h:1211
MethodisLegalAddImmediate
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:296
MethodisLegalAddImmediate
Return true if the specified immediate is legal add immediate, that is the target has add instructions which can add a register with the immediate wit
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:2444
MethodisLegalAddressingMode
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:304
MethodisLegalICmpImmediate
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:300
MethodisLegalICmpImmediate
Return true if the specified immediate is legal icmp immediate, that is the target has icmp instructions which can compare a register against the imme
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:2437
MethodisLegalInteger
Returns true if the specified type is known to be a native integer type supported by the CPU. For example, i64 is not native on most 32-bit CPUs and
suite/synctools/tablegen/include/llvm/IR/DataLayout.h:266
MethodisLegalOrCustom
suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h:1215
MethodisLegalStoreImmediate
Return true if the specified immediate is legal for the value input of a store instruction.
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:2450
MethodisLegalToPacketizeTogether
Check if it is legal to packetize SUI and SUJ together.
suite/synctools/tablegen/include/llvm/CodeGen/DFAPacketizer.h:178
MethodisLegalToPruneDependencies
Check if it is legal to prune dependece between SUI and SUJ.
suite/synctools/tablegen/include/llvm/CodeGen/DFAPacketizer.h:183
MethodisLegalToSplitMBBAt
Return true if it's legal to split the given basic block at the specified instruction (i.e. instruction would be the start of a new basic block).
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:787
MethodisLinkOnceAnyLinkage
suite/synctools/tablegen/include/llvm/IR/GlobalValue.h:305
MethodisLinkOnceLinkage
suite/synctools/tablegen/include/llvm/IR/GlobalValue.h:311
MethodisLinkOnceODRLinkage
suite/synctools/tablegen/include/llvm/IR/GlobalValue.h:308
MethodisLiteral
Return true if this type is uniqued by structural equivalence, false if it is a struct definition.
suite/synctools/tablegen/include/llvm/IR/DerivedTypes.h:277
MethodisLittleEndian
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:749
MethodisLiveIn
suite/synctools/tablegen/include/llvm/CodeGen/LiveVariables.h:289
MethodisLiveInToMBB
suite/synctools/tablegen/include/llvm/CodeGen/LiveIntervals.h:245
MethodisLiveOutOfMBB
suite/synctools/tablegen/include/llvm/CodeGen/LiveIntervals.h:250
MethodisLoadBitCastBeneficial
Return true if the following transform is beneficial: fold (conv (load x)) -> (load (conv*)x) On architectures that don't natively support some vector
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:560
MethodisLoadExtLegalOrCustom
Return true if the specified load with extension is legal or custom on this target.
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:1274
MethodisLoadFromStackSlot
If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:262
MethodisLoadFromStackSlotPostFE
Check for post-frame ptr elimination stack locations as well. This uses a heuristic so it isn't reliable for correctness.
suite/synctools/tablegen/include/llvm/CodeGen/TargetInstrInfo.h:280
MethodisLocal
True iff this segment is a single segment that lies between the specified boundaries, exclusively. Vregs live across a backedge are not considered loc
suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h:510
MethodisLocalLinkage
suite/synctools/tablegen/include/llvm/IR/GlobalValue.h:332
MethodisLocalToUnit
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:1987
MethodisLocalToUnit
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:3031
MethodisLocationAvailable
Return true if location information is available for this diagnostic.
suite/synctools/tablegen/include/llvm/IR/DiagnosticInfo.h:385
MethodisLogicalShift
Return true if this is a logical shift left or a logical shift right.
suite/synctools/tablegen/include/llvm/IR/Instruction.h:203
MethodisLoopHeader
True if the block is a loop header node.
suite/synctools/tablegen/include/llvm/CodeGen/MachineLoopInfo.h:142
MethodisMCSymbol
suite/synctools/tablegen/include/llvm/CodeGen/MachineOperand.h:350
MethodisMSInlineAsm
FIXME: Seems like a layering violation that the AsmDialect, which is X86 specific, be attached to a generic MachineInstr.
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:1262
MethodisMachineConstantPoolEntry
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:1873
MethodisMachineConstantPoolEntry
isMachineConstantPoolEntry - Return true if the MachineConstantPoolEntry is indeed a target specific constantpool entry, not a wrapper over a Constant
suite/synctools/tablegen/include/llvm/CodeGen/MachineConstantPool.h:93
MethodisMachineOpcode
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:683
MethodisMachineVerifierClean
Returns true if the target is expected to pass all machine verifier checks. This is a stopgap measure to fix targets one by one. We will remove this a
suite/synctools/tablegen/include/llvm/Target/TargetMachine.h:463
MethodisMainSubprogram
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:1990
MethodisMapped
suite/synctools/tablegen/include/llvm/ProfileData/Coverage/CoverageMapping.h:682
MethodisMaskAndCmp0FoldingBeneficial
Return if the target supports combining a chain like: \code %andResult = and %val1, #mask %icmpResult = icmp %andResult, 0 \endcode into a single mach
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:665
FunctionisMaterializable
suite/synctools/tablegen/include/llvm/IR/Function.h:192
FunctionisMaterialized
suite/synctools/tablegen/include/llvm/IR/Module.h:529
MethodisMaxCallFrameSizeComputed
suite/synctools/tablegen/include/llvm/CodeGen/MachineFrameInfo.h:628
MethodisMemKind
suite/synctools/tablegen/include/llvm/IR/InlineAsm.h:285
MethodisMemLoc
suite/synctools/tablegen/include/llvm/CodeGen/CallingConvLower.h:146
MethodisMemcpy
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:165
MethodisMemcpyStrSrc
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:170
MethodisMemcpyWithFixedDstAlign
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:166
MethodisMemset
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:164
MethodisMetaInstruction
Return true if this instruction doesn't produce any output in the form of executable instructions.
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:1311
MethodisMetadata
isMetadata - Tests if this is a MO_Metadata operand.
suite/synctools/tablegen/include/llvm/CodeGen/MachineOperand.h:349
MethodisMetadataTy
Return true if this is 'metadata'.
suite/synctools/tablegen/include/llvm/IR/Type.h:184
MethodisMissed
suite/synctools/tablegen/include/llvm/IR/DiagnosticInfo.h:501
MethodisMoveReg
Return true if this instruction is a register move. (including moving values from subreg to reg)
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:904
MethodisMulAddWithConstProfitable
Return true if it may be profitable to transform (mul (add x, c1), c2) -> (add (mul x, c2), c1*c2). This may not be true if c1 and c2 can be represent
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:2126
MethodisMultiStoresCheaperThanBitsMerge
Return true if it is cheaper to split the store of a merged int val from a pair of smaller values into multiple stores.
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:651
MethodisMustAlias
Tests if this is an Order dependence that is marked as "must alias", meaning that the SUnits at either end of the edge have a memory dependence on a k
suite/synctools/tablegen/include/llvm/CodeGen/ScheduleDAG.h:186
MethodisMustTailCall
suite/synctools/tablegen/include/llvm/IR/Instructions.h:1674
FunctionisNON_EXTLoad
Returns true if the specified node is a non-extending load.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:2918
MethodisNaN
Return true if the value is a NaN.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:1623
MethodisNarrowingProfitable
Return true if it's profitable to narrow operations of type VT1 to VT2. e.g. on x86, it's profitable to narrow from i32 to i8 but not from i32 to i16.
suite/synctools/tablegen/include/llvm/CodeGen/TargetLowering.h:2850
MethodisNegative
suite/synctools/tablegen/include/llvm/IR/Constants.h:189
MethodisNegative
Return true if the value is negative.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:1629
MethodisNest
suite/synctools/tablegen/include/llvm/CodeGen/TargetCallingConv.h:117
MethodisNilpotent
Return true if the instruction is nilpotent: Nilpotent operators satisfy: x op x === Id, where Id is the identity for the operator, i.e. a constant
suite/synctools/tablegen/include/llvm/IR/Instruction.h:588
MethodisNoBuiltin
Return true if the call should not be treated as a call to a builtin.
suite/synctools/tablegen/include/llvm/IR/InstrTypes.h:1813
MethodisNoInline
Return true if the call should not be inlined.
suite/synctools/tablegen/include/llvm/IR/InstrTypes.h:1822
MethodisNoReturn
Check if this is marked as noreturn. Return true if this subprogram is C++11 noreturn or C11 _Noreturn
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:2033
MethodisNoTailCall
suite/synctools/tablegen/include/llvm/IR/Instructions.h:1676
MethodisNonIntegralAddressSpace
suite/synctools/tablegen/include/llvm/IR/DataLayout.h:395
MethodisNonIntegralPointerType
suite/synctools/tablegen/include/llvm/IR/DataLayout.h:400
MethodisNonListDebugValue
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:1204
MethodisNonStrictPredicate
@returns true if the comparison predicate is non-strict, false otherwise. Determine if this instruction is using an non-strict comparison predicate.
suite/synctools/tablegen/include/llvm/IR/InstrTypes.h:876
MethodisNonTemporal
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:1296
MethodisNonTemporal
suite/synctools/tablegen/include/llvm/CodeGen/MachineMemOperand.h:291
MethodisNonallocatableRegisterCalleeSave
Some targets have non-allocatable registers that aren't technically part of the explicit callee saved register list, but should be handled as such in
suite/synctools/tablegen/include/llvm/CodeGen/TargetRegisterInfo.h:1101
MethodisNonconcreteOK
Is this a field where nonconcrete values are okay?
suite/synctools/tablegen/include/llvm/TableGen/Record.h:1445
MethodisNoopAddrSpaceCast
Returns true if a cast between SrcAS and DestAS is a noop.
suite/synctools/tablegen/include/llvm/Target/TargetMachine.h:308
MethodisNoopAddrSpaceCast
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:278
FunctionisNormalLoad
Returns true if the specified node is a non-extending and unindexed load.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:2911
MethodisNormalMemory
Tests if this is an Order dependence between two memory accesses where both sides of the dependence access memory in non-volatile and fully modeled wa
suite/synctools/tablegen/include/llvm/CodeGen/ScheduleDAG.h:168
MethodisNormalMemoryOrBarrier
Tests if this is could be any kind of memory dependence.
suite/synctools/tablegen/include/llvm/CodeGen/ScheduleDAG.h:179
FunctionisNormalStore
Returns true if the specified node is a non-truncating and unindexed store.
suite/synctools/tablegen/include/llvm/CodeGen/SelectionDAGNodes.h:2949
MethodisNotDuplicable
Return true if this instruction cannot be safely duplicated. For example, if the instruction has a unique labels attached to it, duplicating it would
suite/synctools/tablegen/include/llvm/CodeGen/MachineInstr.h:921
MethodisNotInMIMap
Returns true if the specified machine instr has been removed or was never entered in the map.
suite/synctools/tablegen/include/llvm/CodeGen/LiveIntervals.h:221
MethodisNumRegsMajorCostOfLSR
suite/synctools/tablegen/include/llvm/CodeGen/BasicTTIImpl.h:331
MethodisObjCDirect
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:2010
MethodisObjcClassComplete
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:736
MethodisObjectPointer
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:735
MethodisObjectPointer
suite/synctools/tablegen/include/llvm/IR/DebugInfoMetadata.h:3187
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